Datasheet

PIC18F46J50 FAMILY
DS39931D-page 74  2011 Microchip Technology Inc.
UFRMH PIC18F2XJ50 PIC18F4XJ50 ---- -xxx ---- -xxx ---- -uuu
UFRML PIC18F2XJ50 PIC18F4XJ50 xxxx xxxx xxxxx xxxx uuuu uuuu
PMCONH
(5)
— PIC18F4XJ50 0--0 0000 0--0 0000 u--u uuuu
PMCONL
(5)
— PIC18F4XJ50 000- 0000 000- 0000 uuu- uuuu
PMMODEH
(5)
— PIC18F4XJ50 0000 0000 0000 0000 uuuu uuuu
PMMODEL
(5)
— PIC18F4XJ50 0000 0000 0000 0000 uuuu uuuu
PMDOUT2H
(5)
— PIC18F4XJ50 0000 0000 0000 0000 uuuu uuuu
PMDOUT2L
(5)
— PIC18F4XJ50 0000 0000 0000 0000 uuuu uuuu
PMDIN2H
(5)
— PIC18F4XJ50 0000 0000 0000 0000 uuuu uuuu
PMDIN2L
(5)
— PIC18F4XJ50 0000 0000 0000 0000 uuuu uuuu
PMEH
(5)
— PIC18F4XJ50 0000 0000 0000 0000 uuuu uuuu
PMEL
(5)
— PIC18F4XJ50 0000 0000 0000 0000 uuuu uuuu
PMSTATH — PIC18F4XJ50 00-- 0000 00-- 0000 uu-- uuuu
PMSTATL — PIC18F4XJ50 10-- 1111 10-- 1111 uu-- uuuu
CVRCON PIC18F2XJ50 PIC18F4XJ50 0000 0000 0000 0000 uuuu uuuu
TCLKCON PIC18F2XJ50 PIC18F4XJ50 ---0 --00 ---0 --uu ---u --uu
DSGPR1
(6)
PIC18F2XJ50 PIC18F4XJ50 uuuu uuuu uuuu uuuu uuuu uuuu
DSGPR0
(6)
PIC18F2XJ50 PIC18F4XJ50 uuuu uuuu uuuu uuuu uuuu uuuu
DSCONH
(6)
PIC18F2XJ50 PIC18F4XJ50 0--- -000 0--- -uuu u--- -uuu
DSCONL
(6)
PIC18F2XJ50 PIC18F4XJ50 ---- -000 ---- -u00 ---- -uuu
DSWAKEH
(6)
PIC18F2XJ50 PIC18F4XJ50 ---- ---0 ---- ---0 ---- ---u
DSWAKEL
(6)
PIC18F2XJ50 PIC18F4XJ50 0-00 00-1 0-00 00-0 u-uu uu-u
ANCON1 PIC18F2XJ50 PIC18F4XJ50 00-0 0000 00-0 0000 uu-u uuuu
ANCON0 PIC18F2XJ50 PIC18F4XJ50 0000 0000 0000 0000 uuuu uuuu
ODCON1 PIC18F2XJ50 PIC18F4XJ50 ---- --00 ---- --uu ---- --uu
ODCON2 PIC18F2XJ50 PIC18F4XJ50 ---- --00 ---- --uu ---- --uu
ODCON3 PIC18F2XJ50 PIC18F4XJ50 ---- --00 ---- --uu ---- --uu
RTCCFG PIC18F2XJ50 PIC18F4XJ50 0-00 0000 u-uu uuuu u-uu uuuu
RTCCAL PIC18F2XJ50 PIC18F4XJ50 0000 0000 uuuu uuuu uuuu uuuu
REFOCON PIC18F2XJ50 PIC18F4XJ50 0-00 0000 0-00 0000 u-uu uuuu
PADCFG1 PIC18F2XJ50 PIC18F4XJ50 ---- -000 ---- -000 ---- -uuu
UCFG PIC18F2XJ50 PIC18F4XJ50 00-0 0000 00-0 0000 uu-u uuuu
TABLE 5-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register Applicable Devices
Power-on Reset,
Brown-out Reset,
Wake From Deep
Sleep
MCLR
Resets
WDT Reset
RESET Instruction
Stack Resets
CM Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Note 1: When the wake-up is due to an interrupt and the GIEH (and GIEL if low priority) bit(s) are set, the TOSU,
TOSH and TOSL are updated with the current value of the PC. The STKPTR is modified to point to the
next location in the hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4: See Tabl e 5 - 1 for Reset value for specific condition.
5: Not implemented on PIC18F2XJ50 devices.
6: Not implemented on “LF” devices.