Datasheet

PIC18F46J50 FAMILY
DS39931D-page 518  2011 Microchip Technology Inc.
FIGURE 30-11: PARALLEL MASTER PORT WRITE TIMING DIAGRAM
TABLE 30-19: PARALLEL MASTER PORT WRITE TIMING REQUIREMENTS
Param.
No
Symbol Characteristics Min Typ Max Units
PM11 PMWR Pulse Width — 0.5 T
CY —ns
PM12 Data Out Valid before PMWR or PMENB
goes Inactive (data setup time)
— 0.75 T
CY —ns
PM13 PMWR or PMEMB Invalid to Data Out
Invalid (data hold time)
— 0.25 T
CY —ns
PM16 PMCS Pulse Width T
CY – 5 — — ns
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2
System
PMALL/
PMD<7:0>
Address
PMA<13:18>
PMWR
PMCS<2:1>
PMRD
Clock
PM12
PM13
PM11
PM16
Data
Address<7:0>
PMALH
Note: Operating Conditions: 2.0V < V
DD < 3.6V, -40°C < TA < +85°C unless otherwise stated.