Datasheet
2011 Microchip Technology Inc. DS39931D-page 41
PIC18F46J50 FAMILY
TABLE 3-5: OSCILLATOR CONFIGURATION OPTIONS FOR USB OPERATION
Input Oscillator
Frequency
PLL Division
(PLLDIV<2:0>)
Clock Mode
(FOSC<2:0>)
MCU Clock Division
(CPDIV<1:0>)
Microcontroller
Clock Frequency
48 MHz N/A EC
None (11)48MHz
2 (10) 24 MHz
3 (01)16MHz
6 (00)8MHz
48 MHz 12 (000)ECPLL
None (11)48MHz
2 (10) 24 MHz
3 (01)16MHz
6 (00)8MHz
40 MHz 10 (001)ECPLL
None (11)48MHz
2 (10) 24 MHz
3 (01)16MHz
6 (00)8MHz
24 MHz 6 (010)ECPLL
None (11)48MHz
2 (10) 24 MHz
3 (01)16MHz
6 (00)8MHz
24 MHz N/A EC
None (11) 24 MHz
2 (10)12MHz
3 (
01)8MHz
6 (00)4MHz
20 MHz 5 (011)ECPLL
None (11)48MHz
2 (10) 24 MHz
3 (01)16MHz
6 (00)8MHz
16 MHz 4 (100) HSPLL, ECPLL
None (11)48MHz
2 (10) 24 MHz
3 (01)16MHz
6 (00)8MHz
12 MHz 3 (101) HSPLL, ECPLL
None (11)48MHz
2 (10) 24 MHz
3 (01)16MHz
6 (00)8MHz
8MHz 2 (110)
HSPLL, ECPLL,
INTOSCPLL/
INTOSCPLLO
None (11)48MHz
2 (10) 24 MHz
3 (01)16MHz
6 (00)8MHz
4MHz 1 (111) HSPLL, ECPLL
None (11)48MHz
2 (10) 24 MHz
3 (01)16MHz
6 (00)8MHz
Legend: All clock frequencies, except 24 MHz, are exclusively associated with full-speed USB operation (USB clock of 48 MHz).
Bold text highlights the clock selections that are compatible with low-speed USB operation (system clock of 24 MHz,
USB clock of 6 MHz).