Datasheet

PIC18F46J50 FAMILY
DS39931D-page 392  2011 Microchip Technology Inc.
24.1 Configuring the Comparator
Voltage Reference
The comparator voltage reference module is controlled
through the CVRCON register (Register 24-1). The
comparator voltage reference provides two ranges of
output voltage, each with 16 distinct levels. The range
to be used is selected by the CVRR bit (CVRCON<5>).
The primary difference between the ranges is the size
of the steps selected by the CV
REF Selection bits
(CVR<3:0>), with one range offering finer resolution.
The equations used to calculate the output of the
comparator voltage reference are as follows:
EQUATION 24-1: CALCULATING OUTPUT
OF THE COMPARATOR
VOLTAGE REFERENCE
The settling time of the comparator voltage reference
must be considered when changing the CV
REF
output (see Table 30-3 in Section 30.0 “Electrical
Characteristics”).
When CVRR = 1:
CVREF = ((CVR<3:0>)/24) x (VDD)
When CVRR =
0:
CVREF =(VDD/4) + ((CVR<3:0>)/32) x (VDD)
REGISTER 24-1: CVRCON: COMPARATOR VOLTAGE REFERENCE CONTROL REGISTER
(BANKED F53h)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CVREN CVROE
(1)
CVRR r CVR3 CVR2 CVR1 CVR0
bit 7 bit 0
Legend: r = Reserved bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 CVREN: Comparator Voltage Reference Enable bit
1 =CV
REF circuit is powered on
0 =CV
REF circuit is powered down
bit 6 CVROE: Comparator V
REF Output Enable bit
(1)
1 =CVREF voltage level is also output on the RA2/AN2/VREF-/CVREF/C2INB pin
0 =CV
REF voltage is disconnected from the RA2/AN2/VREF-/CVREF/C2INB pin
bit 5 CVRR: Comparator VREF Range Selection bit
1 = 0 to 0.667 V
DD, with VDD/24 step size (low range)
0 = 0.25 V
DD to 0.75 VDD, with VDD/32 step size (high range)
bit 4 Reserved: Always maintain as ‘0’
bit 3-0 CVR<3:0>: Comparator VREF Value Selection bits (0  (CVR<3:0>)  15)
When CVRR =
1:
CVREF = ((CVR<3:0>)/24)  (VDD)
When CVRR =
0:
CVREF = (VDD/4) + ((CVR<3:0>)/32)  (VDD)
Note 1: CVROE overrides the TRIS bit setting.