Datasheet

 2011 Microchip Technology Inc. DS39931D-page 25
PIC18F46J50 FAMILY
PORTB (continued)
RB4/PMA1/KBI0/SCK1/SCL1/RP7
RB4
PMA1
KBI0
SCK1
SCL1
RP7
14 14
I/O
I/O
I
I/O
I/O
I/O
DIG
DIG
TTL
DIG
I
2
C
DIG
Digital I/O.
Parallel Master Port address.
Interrupt-on-change pin.
Synchronous serial clock input/output.
I
2
C clock input/output.
Remappable Peripheral Pin 7 input/output.
RB5/PMA0/KBI1/SDI1/SDA1/RP8
RB5
PMA0
KBI1
SDI1
SDA1
RP8
15 15
I/O
I/O
I
I
I/O
I/O
DIG
DIG
TTL
ST
I
2
C
DIG
Digital I/O.
Parallel Master Port address.
Interrupt-on-change pin.
SPI data input.
I
2
C™ data input/output.
Remappable Peripheral Pin 8 input/output.
RB6/KBI2/PGC/RP9
RB6
KBI2
PGC
RP9
16 16
I/O
I
I
I/O
DIG
TTL
ST
DIG
Digital I/O.
Interrupt-on-change pin.
ICSP™ clock input.
Remappable Peripheral Pin 9 input/output.
RB7/KBI3/PGD/RP10
RB7
KBI3
PGD
RP10
17 17
I/O
I
I/O
I/O
DIG
TTL
ST
DIG
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP programming
data pin.
Remappable Peripheral Pin 10 input/output.
TABLE 1-4: PIC18F4XJ50 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
44-
QFN
44-
TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
DIG = Digital output I
2
C™ = Open-Drain, I
2
C-specific
Note 1: RA7 and RA6 will be disabled if OSC1 and OSC2 are used for the clock function.