Datasheet

 2010 Microchip Technology Inc. Preliminary DS39974A-page 275
PIC18F47J13 FAMILY
19.4 PWM (Enhanced Mode)
The Enhanced PWM mode can generate a PWM signal
on up to four different output pins with up to 10 bits of
resolution. It can do this through four different PWM
Output modes:
• Single PWM mode
• Half-Bridge PWM mode
• Full-Bridge PWM, Forward mode
• Full-Bridge PWM, Reverse mode
To select an Enhanced PWM mode, the PxM bits of the
CCPxCON register must be set appropriately.
The PWM outputs are multiplexed with I/O pins and are
designated: PxA, PxB, PxC and PxD. The polarity of the
PWM pins is configurable and is selected by setting the
CCPxM bits in the CCPxCON register appropriately.
Table 19-1 provides the pin assignments for each
Enhanced PWM mode.
Figure 19-3 provides an example of a simplified block
diagram of the Enhanced PWM module.
FIGURE 19-3: SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODE EXAMPLE
Note: To prevent the generation of an
incomplete waveform when the PWM is
first enabled, the ECCP module waits until
the start of a new PWM period before
generating a PWM signal.
Note 1: The TRIS register value for each PWM output must be configured appropriately.
2: Any pin not used by an Enhanced PWM mode is available for alternate pin functions.
CCPR1L
CCPR1H (Slave)
Comparator
TMR2
Comparator
PR2
(1)
RQ
S
Duty Cycle Registers
DC1B<1:0>
Clear Timer2,
Toggle PWM Pin and
Latch Duty Cycle
Note 1: The 8-bit timer, TMR2 register, is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler, to
create the 10-bit time base.
TRIS
ECCPx/Output Pi
n
TRIS
Output Pi
n
TRIS
Output Pi
n
TRIS
Output Pi
n
Output
Controller
PxM<1:0>
2
CCPxM<3:0>
4
ECCP1DEL
ECCPx/PxA
PxB
PxC
PxD