Datasheet

 2010 Microchip Technology Inc. Preliminary DS39974A-page 147
PIC18F47J13 FAMILY
TABLE 10-5: PORTB I/O SUMMARY
Pin Function
TRIS
Setting
I/O
I/O
Type
Description
RB0/AN12/
C3IND/INT0/
RP3
RB0 1 I TTL PORTB<0> data input; weak pull-up when the RBPU
bit is
cleared. Disabled when analog input is enabled.
(1)
0 O DIG LATB<0> data output; not affected by an analog input.
AN12 1 I ANA A/D Input Channel 12.
(1)
C3IND 1 I ANA Comparator 3 Input D.
INT0 1 I ST External Interrupt 0 input.
RP3 1 I ST Remappable Peripheral Pin 3 input.
0 O DIG Remappable Peripheral Pin 3 output.
RB1/AN10/
C3INC/PMBE/
RTCC/RP4
RB1 1 I TTL PORTB<1> data input; weak pull-up when the RBPU
bit is
cleared. Disabled when an analog input is enabled.
(1)
0 O DIG LATB<1> data output; not affected by an analog input.
AN10 1 I ANA A/D Input Channel 10.
(1)
C3INC 1 I ANA Comparator 3 Input C.
PMBE
(3)
x O DIG Parallel Master Port byte enable.
RTCC 0 O DIG Asynchronous serial transmit data output (USART module).
RP4 1 I ST Remappable Peripheral Pin 4 input.
0 O DIG Remappable Peripheral Pin 4 output.
RB2/AN8/
C2INC/CTED1/
PMA3/REFO/
RP5
RB2 1 I TTL PORTB<2> data input; weak pull-up when the RBPU
bit is
cleared. Disabled when an analog input is enabled.
(1)
0 O DIG LATB<2> data output; not affected by an analog input.
AN8 1 I ANA A/D Input Channel 8.
(1)
C2INC 1 I ANA Comparator 2 Input C.
CTED1 1 I ST CTMU Edge 1 input.
PMA3
(3)
x O DIG Parallel Master Port address.
REFO 0 O DIG Reference output clock.
RP5 1 I ST Remappable Peripheral Pin 5 input.
0 O DIG Remappable Peripheral Pin 5 output.
RB3/AN9/
C3INA/CTED2/
PMA2/RP6
RB3 0 O DIG LATB<3> data output; not affected by analog input.
1 I TTL PORTB<3> data input; weak pull-up when the RBPU
bit is
cleared. Disabled when analog input is enabled.
(1)
AN9 1 I ANA A/D Input Channel 9.
(1)
C3INA 1 I ANA Comparator 3 Input A.
CTED2 1 I ST CTMU Edge 2 input.
PMA2
(3)
x O DIG Parallel Master Port address.
RP6 1 I ST Remappable Peripheral Pin 6 input.
0 O DIG Remappable Peripheral Pin 6 output.
Legend: DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level
input/output; x = Don’t care (TRISx bit does not affect port direction or is overridden for this option)
Note 1: Pins are configured as analog inputs by default on POR. Using these pins for digital inputs requires setting
the appropriate bits in the ANCON1 register.
2: All other pin functions are disabled when ICSP™ or ICD is enabled.
3: Only on 44-pin devices (PIC18F46J13, PIC18F47J13, PIC18LF46J13 and PIC18LF47J13).
4: Only on 28-pin devices (PIC18F26J13, PIC18F27J13, PIC18LF26J13 and PIC18LF27J13).