Datasheet

PIC18F47J13 FAMILY
DS39974A-page 100 Preliminary  2010 Microchip Technology Inc.
6.3.5 STATUS REGISTER
The STATUS register, shown in Register 6-2, contains
the arithmetic status of the ALU. The STATUS register
can be the operand for any instruction, as with any
other register. If the STATUS register is the destination
for an instruction that affects the Z, DC, C, OV or N bits,
then the write to these five bits is disabled.
These bits are set or cleared according to the device
logic. Therefore, the result of an instruction with the
STATUS register as destination may be different than
intended. For example, CLRF STATUS will set the Z bit
but leave the other bits unchanged. The STATUS
register then reads back as ‘000u u1uu’. It is recom-
mended, therefore, that only BCF, BSF, SWAPF, MOVFF
and MOVWF instructions are used to alter the STATUS
register because these instructions do not affect the Z,
C, DC, OV or N bits in the STATUS register.
For other instructions not affecting any Status bits, see
the instruction set summary in Table 28-2 and
Table 28-3.
Note: The C and DC bits operate as Borrow and
Digit Borrow
bits, respectively in
subtraction.
REGISTER 6-2: STATUS REGISTER (ACCESS FDBh)
U-0 U-0 U-0 R/W-x R/W-x R/W-x R/W-x R/W-x
— — —NOVZDC
(1)
C
(2)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-5 Unimplemented: Read as ‘0’
bit 4 N: Negative bit
This bit is used for signed arithmetic (2’s complement). It indicates whether the result was negative
(ALU MSB = 1).
1 = Result was negative
0 = Result was positive
bit 3 OV: Overflow bit
This bit is used for signed arithmetic (2’s complement). It indicates an overflow of the 7-bit magnitude,
which causes the sign bit (Bit 7) to change state.
1 = Overflow occurred for signed arithmetic (in this arithmetic operation)
0 = No overflow occurred
bit 2 Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
bit 1 DC: Digit Carry/Digit Borrow
bit
(1)
For ADDWF, ADDLW, SUBLW and SUBWF instructions:
1 = A carry out from the 4
th
low-order bit of the result occurred
0 = No carry out from the 4
th
low-order bit of the result
bit 0 C: Carry/Borrow
bit
(2)
For ADDWF, ADDLW, SUBLW and SUBWF instructions:
1 = A carry out from the MSb of the result occurred
0 = No carry out from the MSb of the result occurred
Note 1: For Digit Borrow,
the polarity is reversed. A subtraction is executed by adding the 2’s complement of the
second operand. For rotate (RRF, RLF) instructions, this bit is loaded with either bit 4 or bit 3 of the source
register.
2: For Borrow,
the polarity is reversed. A subtraction is executed by adding the 2’s complement of the sec-
ond operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low-order bit of the
source register.