Datasheet

2011 Microchip Technology Inc. DS39932D-page 95
PIC18F46J11 FAMILY
RPOR23
(5)
Remappable Pin RP23 Output Signal Select Bits ---0 0000 74, 169
RPOR22
(5)
Remappable Pin RP22 Output Signal Select Bits ---0 0000 74, 168
RPOR21
(5)
Remappable Pin RP21 Output Signal Select Bits ---0 0000 74, 168
RPOR20
(5)
Remappable Pin RP20 Output Signal Select Bits ---0 0000 74, 168
RPOR19
(5)
Remappable Pin RP19 Output Signal Select Bits ---0 0000 74, 167
RPOR18
Remappable Pin RP18 Output Signal Select Bits ---0 0000 74, 167
RPOR17
Remappable Pin RP17 Output Signal Select Bits ---0 0000 75, 167
RPOR16
Remappable Pin RP16 Output Signal Select Bits ---0 0000 75, 166
RPOR15
Remappable Pin RP15 Output Signal Select Bits ---0 0000 75, 166
RPOR14
Remappable Pin RP14 Output Signal Select Bits ---0 0000 75, 166
RPOR13
Remappable Pin RP13 Output Signal Select Bits ---0 0000 75, 165
RPOR12
Remappable Pin RP12 Output Signal Select Bits ---0 0000 75, 165
RPOR11
Remappable Pin RP11 Output Signal Select Bits ---0 0000 75, 165
RPOR10
Remappable Pin RP10 Output Signal Select Bits ---0 0000 75, 164
RPOR9
Remappable Pin RP9 Output Signal Select Bits ---0 0000 75, 164
RPOR8
Remappable Pin RP8 Output Signal Select Bits ---0 0000 75, 163
RPOR7
Remappable Pin RP7 Output Signal Select Bits ---0 0000 75, 163
RPOR6
Remappable Pin RP6 Output Signal Select Bits ---0 0000 75, 163
RPOR5
Remappable Pin RP5 Output Signal Select Bits ---0 0000 75, 162
RPOR4
Remappable Pin RP4 Output Signal Select Bits ---0 0000 75, 162
RPOR3
Remappable Pin RP3 Output Signal Select Bits ---0 0000 75, 162
RPOR2
Remappable Pin RP2 Output Signal Select Bits ---0 0000 75, 161
RPOR1
Remappable Pin RP1 Output Signal Select Bits ---0 0000 75, 161
RPOR0
Remappable Pin RP0 Output Signal Select Bits ---0 0000 75, 161
TABLE 6-4: REGISTER FILE SUMMARY (PIC18F46J11 FAMILY)
File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Details
on
Page:
Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition, r = reserved. Bold indicates shared access SFRs.
Note 1: Bit 21 of the PC is only available in Serial Programming (SP) modes.
2: Reset value is ‘0’ when Two-Speed Start-up is enabled and ‘1’ if disabled.
3: The SSPxMSK registers are only accessible when SSPxCON2<3:0> = 1001.
4: Alternate names and definitions for these bits when the MSSP module is operating in I
2
C™ Slave mode. See Section 19.5.3.2 “Address
Masking Modes” for details.
5: These bits and/or registers are only available in 44-pin devices; otherwise, they are unimplemented and read as ‘0’. Reset values are shown for
44-pin devices.
6: The PMADDRH/PMDOUT1H and PMADDRL/PMDOUT1L register pairs share the same physical registers and addresses, but have different
functions determined by the module’s operating mode. See Section 11.1.2 “Data Registers” for more information.