Datasheet

PIC18F46J11 FAMILY
DS39932D-page 504 2011 Microchip Technology Inc.
FIGURE 29-21: EUSARTx SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
TABLE 29-28: EUSARTx SYNCHRONOUS TRANSMISSION REQUIREMENTS
FIGURE 29-22: EUSARTx SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
TABLE 29-29: EUSARTx SYNCHRONOUS RECEIVE REQUIREMENTS
Param
No.
Symbol Characteristic Min Max Units Conditions
120 T
CKH2DTV Sync XMIT (Master and Slave)
Clock High to Data Out Valid 40 ns
121 TCKRF Clock Out Rise Time and Fall Time (Master mode) 20 ns
122 TDTRF Data Out Rise Time and Fall Time 20 ns
121
121
120
122
TXx/CKx
RXx/DTx
pin
pin
Note: Refer to Figure 29-4 for load conditions.
Param.
No.
Symbol Characteristic Min Max Units Conditions
125 T
DTV2CKL Sync RCV (Master and Slave)
Data Hold before CKx (DTx hold time) 10 ns
126 TCKL2DTL Data Hold after CKx (DTx hold time) 15 ns
125
126
TXx/CKx
RXx/DTx
pin
pin
Note: Refer to Figure 29-4 for load conditions.