Datasheet

2011 Microchip Technology Inc. DS39932D-page 355
PIC18F46J11 FAMILY
After the A/D module has been configured as desired,
the selected channel must be acquired before the
conversion is started. The analog input channels must
have their corresponding TRIS bits selected as an
input. To determine acquisition time, see Section 21.1
“A/D Acquisition Requirements”. After this acquisi-
tion time has elapsed, the A/D conversion can be
started. An acquisition time can be programmed to
occur between setting the GO/DONE
bit and the actual
start of the conversion.
The following steps should be followed to do an A/D
conversion:
1. Configure the A/D module:
Configure the required ADC pins as analog
pins using ANCON0, ANCON1
Set voltage reference using ADCON0
Select A/D input channel (ADCON0)
Select A/D acquisition time (ADCON1)
Select A/D conversion clock (ADCON1)
Turn on A/D module (ADCON0)
2. Configure A/D interrupt (if desired):
Clear ADIF bit
Set ADIE bit
•Set GIE bit
3. Wait the required acquisition time (if required).
4. Start conversion:
Set GO/DONE
bit (ADCON0<1>)
5. Wait for A/D conversion to complete, by either:
Polling for the GO/DONE
bit to be cleared
OR
Waiting for the A/D interrupt
6. Read A/D Result registers (ADRESH:ADRESL);
clear bit, ADIF, if required.
7. For next conversion, go to step 1 or step 2, as
required. The A/D conversion time per bit is
defined as T
AD. A minimum wait of 2 TAD is
required before next acquisition starts.
FIGURE 21-2: ANALOG INPUT MODEL
VAIN
CPIN
RS
ANx
5 pF
V
DD
VT = 0.6V
V
T = 0.6V
I
LEAKAGE
RIC 1k
Sampling
Switch
SS
R
SS
CHOLD = 25 pF
V
SS
Sampling Switch
1234
(k)
VDD
±100 nA
Legend: CPIN
VT
ILEAKAGE
RIC
SS
C
HOLD
= Input Capacitance
= Threshold Voltage
= Leakage Current at the pin due to
= Interconnect Resistance
= Sampling Switch
= Sample/Hold Capacitance (from DAC)
various junctions
= Sampling Switch ResistanceRSS