Datasheet
2011 Microchip Technology Inc. DS39932D-page 351
PIC18F46J11 FAMILY
21.0 10-BIT ANALOG-TO-DIGITAL
CONVERTER (A/D) MODULE
The Analog-to-Digital (A/D) Converter module has
10 inputs for the 28-pin devices and 13 for the 44-pin
devices. Additionally, two internal channels are
available for sampling the V
DDCORE and VBG absolute
reference voltage. This module allows conversion of an
analog input signal to a corresponding 10-bit digital
number.
The module has six registers:
• A/D Control Register 0 (ADCON0)
• A/D Control Register 1 (ADCON1)
• A/D Port Configuration Register 2 (ANCON0)
• A/D Port Configuration Register 1 (ANCON1)
• A/D Result Registers (ADRESH and ADRESL)
The ADCON0 register, in Register 21-1, controls the
operation of the A/D module. The ADCON1 register, in
Register 21-2, configures the A/D clock source,
programmed acquisition time and justification.
The ANCON0 and ANCON1 registers, in Register 21-3
and Register 21-4, configure the functions of the port
pins.
REGISTER 21-1: ADCON0: A/D CONTROL REGISTER 0 (ACCESS FC2h)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
VCFG1 VCFG0 CHS3
(2)
CHS2
(2)
CHS1
(2)
CHS0
(2)
GO/DONE ADON
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 VCFG1: Voltage Reference Configuration bit (VREF- source)
1 = V
REF- (AN2)
0 = AV
SS
(4)
bit 6 VCFG0: Voltage Reference Configuration bit (VREF+ source)
1 = V
REF+ (AN3)
0 = AV
DD
(4)
bit 5-2 CHS<3:0>: Analog Channel Select bits
(2)
0000 = Channel 00 (AN0)
0001 = Channel 01 (AN1)
0010 = Channel 02 (AN2)
0011 = Channel 03 (AN3)
0100 = Channel 04 (AN4)
0101 = Channel 05 (AN5)
(1)
0110 = Channel 06 (AN6)
(1)
0111 = Channel 07 (AN7)
(1)
1000 = Channel 08 (AN8)
1001 = Channel 09 (AN9)
1010 = Channel 10 (AN10)
1011 = Channel 11 (AN11)
1100 = Channel 12 (AN12)
1101 = (Reserved)
1110 = V
DDCORE
1111 = VBG Absolute Reference (~1.2V)
(3)
bit 1 GO/DONE: A/D Conversion Status bit
When ADON =
1:
1 = A/D conversion in progress
0 = A/D Idle
bit 0 ADON: A/D On bit
1 = A/D Converter module is enabled
0 = A/D Converter module is disabled
Note 1:
These channels are not implemented on 28-pin devices.
2: Performing a conversion on unimplemented channels will return random values.
3: For best accuracy, the band gap reference circuit should be enabled (ANCON1<7> = 1) at least 10 ms before performing a conversion
on this channel.
4: On 44-pin QFN devices, AV
DD and AVSS reference sources are intended to be externally connected to VDD and VSS levels. Other
package types tie AV
DD and AVSS to VDD and VSS internally.