Datasheet
2011 Microchip Technology Inc. DS39932D-page 27
PIC18F46J11 FAMILY
RC6/PMA5/TX1/CK1/RP17
RC6
PMA5
TX1
CK1
RP17
44 44
I/O
O
O
I/O
I/O
ST
DIG
DIG
ST
DIG
PORTC (continued)
Digital I/O.
Parallel Master Port address.
EUSART1 asynchronous transmit.
EUSART1 synchronous clock (see related
RX1/DT1).
Remappable peripheral pin 17.
RC7/PMA4/RX1/DT1/RP18
RC7
PMA4
RX1
DT1
RP18
11
I/O
O
I
I/O
I/O
ST
DIG
ST
ST
DIG
Digital I/O.
Parallel Master Port address.
EUSART1 asynchronous receive.
EUSART1 synchronous data (see related TX1/CK1).
Remappable peripheral pin 18.
TABLE 1-4: PIC18F4XJ11 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
44-
QFN
44-
TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
DIG = Digital output
Note 1: RA7 and RA6 will be disabled if OSC1 and OSC2 are used for the clock function.