Datasheet

 2011 Microchip Technology Inc. DS39932D-page 243
PIC18F46J11 FAMILY
17.3 Alarm
The alarm features and characteristics are:
• Configurable from half a second to one year
• Enabled using the ALRMEN bit (ALRMCFG<7>,
Register 17-4)
• Offers one-time and repeat alarm options
17.3.1 CONFIGURING THE ALARM
The alarm feature is enabled using the ALRMEN bit.
This bit is cleared when an alarm is issued. The bit will
not be cleared if the CHIME bit = 1 or if ALRMRPT  0.
The interval selection of the alarm is configured
through the ALRMCFG bits (AMASK<3:0>). (See
Figure 17-5.) These bits determine which and how
many digits of the alarm must match the clock value for
the alarm to occur.
The alarm can also be configured to repeat based on a
preconfigured interval. The number of times this occurs
after the alarm is enabled is stored in the ALRMRPT
register.
FIGURE 17-5: ALARM MASK SETTINGS
Note: While the alarm is enabled (ALRMEN =
1), changing any of the registers – other
than the RTCCAL, ALRMCFG and ALRM-
RPT registers and the CHIME bit – can
result in a false alarm event leading to a
false alarm interrupt. To avoid this, only
change the timer and alarm values while
the alarm is disabled (ALRMEN = 0). It is
recommended that the ALRMCFG and
ALRMRPT registers and CHIME bit be
changed when RTCSYNC = 0.
Note 1: Annually, except when configured for February 29.
s
ss
mss
mm s s
hh mm ss
dhhmmss
dd hh mm ss
mm d d h h mm s s
Day of the
Week Month Day Hours Minutes Seconds
Alarm Mask Setting
AMASK<3:0>
0000 – Every half second
0001 – Every second
0010 – Every 10 seconds
0011 – Every minute
0100 – Every 10 minutes
0101 – Every hour
0110 – Every day
0111 – Every week
1000 – Every month
1001 – Every year
(1)