Datasheet

 2011 Microchip Technology Inc. DS39932D-page 203
PIC18F46J11 FAMILY
REGISTER 13-3: TCLKCON: TIMER CLOCK CONTROL REGISTER (BANKED F52h)
U-0 U-0 U-0 R-0 U-0 U-0 R/W-0 R/W-0
— — — T1RUN — —T3CCP2T3CCP1
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-5 Unimplemented: Read as ‘0’
bit 4 T1RUN: Timer1 Run Status bit
1 = Device is currently clocked by T1OSC/T1CKI
0 = System clock comes from an oscillator other than T1OSC/T1CKI
bit 3-2 Unimplemented: Read as ‘0’
bit 1-0 T3CCP<2:1>: ECCP Timer Assignment bits
10 = ECCP1 and ECCP2 both use Timer3 (capture/compare) and Timer4 (PWM)
01 = ECCP1 uses Timer1 (compare/capture) and Timer2 (PWM); ECCP2 uses Timer3
(capture/compare) and Timer4 (PWM)
00 = ECCP1 and ECCP2 both use Timer1 (capture/compare) and Timer2 (PWM)