Datasheet

 2011 Microchip Technology Inc. DS39932D-page 155
PIC18F46J11 FAMILY
10.7.6 PERIPHERAL PIN SELECT
REGISTERS
The PIC18F46J11 family of devices implements a total
of 37 registers for remappable peripheral configuration
of 44-pin devices. The 28-pin devices have 31 registers
for remappable peripheral configuration.
Note: Input and output register values can only
be changed if PPS<IOLOCK> = 0. See
Example 10-7 for a specific command
sequence.
REGISTER 10-5: PPSCON: PERIPHERAL PIN SELECT INPUT REGISTER 0 (BANKED EFFh)
(1)
U-0 U-0 U-0 U-0 U-0 U-0 U-0 R/W-0
— — — — — — —IOLOCK
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-1 Unimplemented: Read as ‘0’
bit 0 IOLOCK: I/O Lock Enable bit
1 = I/O lock active, RPORx and RPINRx registers are write-protected
0 = I/O lock not active, pin configurations can be changed
Note 1: Register values can only be changed if PPSCON<IOLOCK> = 0.