Datasheet
PIC18F2682/2685/4682/4685
DS39761C-page 476 © 2009 Microchip Technology Inc.
PWM (ECCP1 Module) .................................................... 177
Auto-Shutdown ........................................................ 172
Direction Change in Full-Bridge
Output Mode .................................................... 182
Duty Cycle ................................................................ 178
ECCPR1H:ECCPR1L Registers ..............................177
Effects of a Reset ..................................................... 187
Enhanced Mode ....................................................... 177
Enhanced PWM Auto-Shutdown ............................. 184
Example Frequencies/Resolutions ..........................178
Full-Bridge Application Example .............................. 182
Full-Bridge Mode ...................................................... 181
Half-Bridge Mode ..................................................... 180
Half-Bridge Output Mode Applications Example ...... 180
Output Configurations .............................................. 178
Output Relationships (Active-High) ..........................179
Output Relationships (Active-Low) ...........................179
Period ....................................................................... 177
Programmable Dead-Band Delay ............................ 184
Setup ........................................................................ 187
Start-up Considerations ........................................... 186
TMR2 to PR2 Match ................................................ 177
Q
Q Clock .................................................................... 172, 178
R
RAM. See Data Memory.
RC Oscillator ...................................................................... 27
RCIO Oscillator Mode ................................................ 27
RC_IDLE Mode .................................................................. 41
RC_RUN Mode .................................................................. 37
RCALL .............................................................................. 395
RCON Register
Bit Status During Initialization .................................... 50
Reader Response ............................................................ 482
Register File Summary ................................................. 78–88
Registers
ADCON0 (A/D Control 0) ......................................... 249
ADCON1 (A/D Control 1) ......................................... 250
ADCON2 (A/D Control 2) ......................................... 251
BAUDCON (Baud Rate Control) .............................. 232
BIE0 (Buffer Interrupt Enable 0) ............................... 321
BnCON (TX/RX Buffer n Control,
Receive Mode) ................................................. 297
BnCON (TX/RX Buffer n Control,
Transmit Mode) ................................................ 298
BnDLC (TX/RX Buffer n Data Length Code
in Receive Mode) ............................................. 303
BnDLC (TX/RX Buffer n Data Length Code
in Transmit Mode) ............................................ 304
BnDm (TX/RX Buffer n Data Field Byte m
in Receive Mode) ............................................. 302
BnDm (TX/RX Buffer n Data Field Byte m
in Transmit Mode) ............................................ 302
BnEIDH (TX/RX Buffer n Extended Identifier,
High Byte in Receive Mode) ............................301
BnEIDH (TX/RX Buffer n Extended Identifier,
High Byte in Transmit Mode) ........................... 301
BnEIDL (TX/RX Buffer n Extended Identifier,
Low Byte in Receive Mode) ..................... 301, 302
BnSIDH (TX/RX Buffer n Standard Identifier,
High Byte in Receive Mode) ............................299
BnSIDH (TX/RX Buffer n Standard Identifier,
High Byte in Transmit Mode) ........................... 299
BnSIDL (TX/RX Buffer n Standard Identifier,
Low Byte in Receive Mode) ............................. 300
BRGCON1 (Baud Rate Control 1) ........................... 314
BRGCON2 (Baud Rate Control 2) ........................... 315
BRGCON3 (Baud Rate Control 3) ........................... 316
BSEL0 (Buffer Select 0) ........................................... 304
CCP1CON (Capture/Compare/PWM Control) ......... 165
CIOCON (CAN I/O Control) ..................................... 317
CMCON (Comparator Control) ................................ 259
COMSTAT (CAN Communication Status) ............... 283
CONFIG1H (Configuration 1 High) .......................... 346
CONFIG2H (Configuration 2 High) .......................... 348
CONFIG2L (Configuration 2 Low) ........................... 347
CONFIG3H (Configuration 3 High) .......................... 349
CONFIG4L (Configuration 4 Low) ........................... 349
CONFIG5H (Configuration 5 High) .......................... 350
CONFIG5L (Configuration 5 Low) ........................... 350
CONFIG6H (Configuration 6 High) .......................... 352
CONFIG6L (Configuration 6 Low) ........................... 351
CONFIG7H (Configuration 7 High) .......................... 353
CONFIG7L (Configuration 7 Low) ........................... 353
CVRCON (Comparator Voltage
Reference Control) .......................................... 265
DEVID1 (Device ID 1) .............................................. 354
DEVID2 (Device ID 2) .............................................. 354
ECANCON (Enhanced CAN Control) ...................... 282
ECCP1AS (Enhanced Capture/Compare/PWM
Auto-Shutdown Configuration) ........................ 185
ECCP1CON (Enhanced
Capture/Compare/PWM Control) .................... 175
ECCP1DEL (PWM Dead-Band Delay) .................... 184
EECON1 (Data EEPROM Control 1) ................. 99, 108
HLVDCON (High/Low-Voltage Detect Control) ....... 269
INTCON (Interrupt Control) ...................................... 117
INTCON2 (Interrupt Control 2) ................................. 118
INTCON3 (Interrupt Control 3) ................................. 119
IPR1 (Peripheral Interrupt Priority 1) ....................... 126
IPR2 (Peripheral Interrupt Priority 2) ....................... 127
IPR3 (Peripheral Interrupt Priority 3) ............... 128, 320
MSEL0 (Mask Select 0) ........................................... 310
MSEL1 (Mask Select 1) ........................................... 311
MSEL2 (Mask Select 2) ........................................... 312
MSEL3 (Mask Select 3) ........................................... 313
OSCCON (Oscillator Control) .................................... 32
OSCTUNE (Oscillator Tuning) ................................... 29
PIE1 (Peripheral Interrupt Enable 1) ........................ 123
PIE2 (Peripheral Interrupt Enable 2) ........................ 124
PIE3 (Peripheral Interrupt Enable 3) ................ 125, 319
PIR1 (Peripheral Interrupt Request
(Flag) 1) ........................................................... 120
PIR2 (Peripheral Interrupt Request
(Flag) 2) ........................................................... 121
PIR3 (Peripheral Interrupt Request
(Flag) 3) ................................................... 122, 318
RCON (Reset Control) ....................................... 44, 129
RCSTA (Receive Status and Control) ..................... 231
RXB0CON (Receive Buffer 0 Control) ..................... 290
RXB1CON (Receive Buffer 1 Control) ..................... 292
RXBnDLC (Receive Buffer n
Data Length Code) .......................................... 295
RXBnDm (Receive Buffer n
Data Field Byte m) ........................................... 295
RXBnEIDH (Receive Buffer n
Extended Identifier, High Byte) ........................ 294