Datasheet

PIC18F2682/2685/4682/4685
DS39761C-page 470 © 2009 Microchip Technology Inc.
Capture (CCP1 Module) ...................................................167
Associated Registers ...............................................170
CAN Message Time-Stamp ..................................... 167
CCP1 Pin Configuration ........................................... 167
CCPR1H:CCPR1L Registers ................................... 167
Prescaler ..................................................................167
Software Interrupt .................................................... 167
Timer1/Timer3 Mode Selection ................................ 167
Capture (ECCP1 Module) ................................................ 176
Capture/Compare/PWM (CCP1) ...................................... 165
Capture Mode. See Capture.
CCP1 Mode and Timer Resources ..........................166
CCPR1H or ECCPR1H Register ............................. 166
CCPR1L or ECCPR1L Register ............................... 166
Compare Mode. See Compare.
Interaction Between CCP1 and ECCP1
for Timer Resources ........................................ 166
Module Configuration ...............................................166
Clock Sources .................................................................... 30
Effects of Power-Managed Modes ............................. 33
Selecting the 31 kHz Source ......................................31
Selection Using OSCCON Register ........................... 31
CLRF ................................................................................381
CLRWDT ..........................................................................381
Code Examples
16 x 16 Signed Multiply Routine .............................. 114
16 x 16 Unsigned Multiply Routine .......................... 114
8 x 8 Signed Multiply Routine .................................. 113
8 x 8 Unsigned Multiply Routine .............................. 113
Changing Between Capture Prescalers ................... 167
Changing to Configuration Mode ............................. 280
Computed GOTO Using an Offset Value ................... 66
Data EEPROM Read ...............................................109
Data EEPROM Refresh Routine .............................. 110
Data EEPROM Write ............................................... 109
Erasing a Flash Program Memory Row ................... 102
Fast Register Stack .................................................... 66
How to Clear RAM (Bank 1) Using
Indirect Addressing ............................................ 90
Implementing a Real-Time Clock Using
a Timer1 Interrupt Service ...............................157
Initializing PORTA .................................................... 131
Initializing PORTB .................................................... 134
Initializing PORTC .................................................... 137
Initializing PORTD .................................................... 140
Initializing PORTE .................................................... 143
Loading the SSPBUF (SSPSR) Register ................. 192
Reading a CAN Message ........................................ 296
Reading a Flash Program Memory Word ................ 101
Saving STATUS, WREG and BSR
Registers in RAM ............................................. 130
Transmitting a CAN Message Using
Banked Method ................................................ 288
Transmitting a CAN Message Using WIN Bits ......... 289
WIN and ICODE Bits Usage in Interrupt Service
Routine to Access TX/RX Buffers ...................280
Writing to Flash Program Memory ................... 104–105
Code Protection ............................................................... 345
COMF ............................................................................... 382
Comparator ...................................................................... 259
Analog Input Connection Considerations ................ 263
Associated Registers ............................................... 263
Configuration ........................................................... 260
Effects of a Reset .................................................... 262
Interrupts ................................................................. 262
Operation ................................................................. 261
Operation During Sleep ........................................... 262
Outputs .................................................................... 261
Reference ................................................................ 261
External Signal ................................................ 261
Internal Signal .................................................. 261
Response Time ........................................................ 261
Comparator Specifications ............................................... 433
Comparator Voltage Reference ....................................... 265
Accuracy and Error .................................................. 266
Associated Registers ............................................... 267
Configuring .............................................................. 265
Connection Considerations ...................................... 266
Effects of a Reset .................................................... 266
Operation During Sleep ........................................... 266
Compare (CCP1 Module) ................................................ 169
Associated Registers ............................................... 170
CCP1 Pin Configuration ........................................... 169
CCPR1 Register ...................................................... 169
Software Interrupt .................................................... 169
Special Event Trigger .............................................. 169
Timer1/Timer3 Mode Selection ................................ 169
Compare (ECCP1 Module) .............................................. 176
Special Event Trigger .............................. 163, 176, 258
Configuration Bits ............................................................ 345
Configuration Mode ......................................................... 327
Configuration Register
Protection ................................................................ 364
Context Saving During Interrupts ..................................... 130
Conversion Considerations .............................................. 466
CPFSEQ .......................................................................... 382
CPFSGT .......................................................................... 383
CPFSLT ........................................................................... 383
Crystal Oscillator/Ceramic Resonators .............................. 25
Customer Change Notification Service ............................ 481
Customer Notification Service ......................................... 481
Customer Support ............................................................ 481
D
Data Addressing Modes .................................................... 90
Comparing Addressing Options with the Extended In-
struction Set Enabled ........................................ 94
Direct ......................................................................... 90
Indexed Literal Offset ................................................ 93
Affected Instructions .......................................... 93
BSR ................................................................... 95
Mapping the Access Bank ................................. 95
Indirect ....................................................................... 90
Inherent and Literal .................................................... 90
Data EEPROM
Code Protection ....................................................... 364