Datasheet

© 2009 Microchip Technology Inc. DS39761C-page 317
PIC18F2682/2685/4682/4685
23.2.5 CAN MODULE I/O CONTROL
REGISTER
This register controls the operation of the CAN module’s
I/O pins in relation to the rest of the microcontroller.
REGISTER 23-55: CIOCON: CAN I/O CONTROL REGISTER
U-0 U-0 R/W-0 R/W-0 U-0 U-0 U-0 U-0
ENDRHI
(1)
CANCAP
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 Unimplemented: Read as ‘0
bit 5 ENDRHI: Enable Drive High bit
(1)
1 = CANTX pin will drive VDD when recessive
0 = CANTX pin will be tri-state when recessive
bit 4 CANCAP: CAN Message Receive Capture Enable bit
1 = Enable CAN capture, CAN message receive signal replaces input on RC2/CCP1
0 = Disable CAN capture, RC2/CCP1 input to CCP1 module
bit 3-0 Unimplemented: Read as ‘0
Note 1: Always set this bit when using differential bus to avoid signal crosstalk in CANTX from other nearby pins.