Datasheet

© 2009 Microchip Technology Inc. DS39761C-page 273
PIC18F2682/2685/4682/4685
22.6 Operation During Sleep
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the HLVDIF bit will be set and the device will
wake-up from Sleep. Device execution will continue
from the interrupt vector address if interrupts have
been globally enabled.
22.7 Effects of a Reset
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
TABLE 22-1: REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on Page
HLVDCON VDIRMAG
— IRVST HLVDEN HLVDL3 HLVDL2 HLVDL1 HLVDL0 52
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 51
PIR2
OSCFIF CMIF
(1)
— EEIF BCLIF HLVDIF TMR3IF ECCP1IF
(1)
54
PIE2
OSCFIE CMIE
(1)
— EEIE BCLIE HLVDIE TMR3IE ECCP1IE
(1)
54
IPR2 OSCFIP CMIP
(1)
— EEIP BCLIP HLVDIP TMR3IP ECCP1IP
(1)
53
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the HLVD module.
Note 1: These bits are available in PIC18F4682/4685 devices and reserved in PIC18F2682/2685 devices.