Datasheet

© 2009 Microchip Technology Inc. DS39761C-page 111
PIC18F2682/2685/4682/4685
TABLE 7-1: REGISTERS ASSOCIATED WITH DATA EEPROM MEMORY
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 51
EEADRH
— — — — — — EEPROM Address
Register High Byte
53
EEADR EEPROM Address Register Low Byte 53
EEDATA EEPROM Data Register 53
EECON2 EEPROM Control Register 2 (not a physical register) 53
EECON1 EEPGD CFGS
— FREE WRERR WREN WR RD 53
IPR2 OSCFIP CMIP
(1)
— EEIP BCLIP HLVDIP TMR3IP ECCP1IP
(1)
53
PIR2 OSCFIF CMIF
(1)
— EEIF BCLIF HLVDIF TMR3IF ECCP1IF
(1)
54
PIE2 OSCFIE CMIE
(1)
— EEIE BCLIE HLVDIE TMR3IE ECCP1IE
(1)
54
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used during Flash/EEPROM access.
Note 1: These bits are available in PIC18F4682/4685 devices and reserved in PIC18F2682/2685 devices.