Datasheet

© 2008 Microchip Technology Inc. DS39626E-page 15
PIC18F2525/2620/4525/4620
PORTC is a bidirectional I/O port.
RC0/T1OSO/T13CKI
RC0
T1OSO
T13CKI
11
I/O
O
I
ST
—
ST
Digital I/O.
Timer1 oscillator output.
Timer1/Timer3 external clock input.
RC1/T1OSI/CCP2
RC1
T1OSI
CCP2
(2)
12
I/O
I
I/O
ST
Analog
ST
Digital I/O.
Timer1 oscillator input.
Capture 2 input/Compare 2 output/PWM2 output.
RC2/CCP1
RC2
CCP1
13
I/O
I/O
ST
ST
Digital I/O.
Capture 1 input/Compare 1 output/PWM1 output.
RC3/SCK/SCL
RC3
SCK
SCL
14
I/O
I/O
I/O
ST
ST
ST
Digital I/O.
Synchronous serial clock input/output for SPI mode.
Synchronous serial clock input/output for I
2
C™ mode.
RC4/SDI/SDA
RC4
SDI
SDA
15
I/O
I
I/O
ST
ST
ST
Digital I/O.
SPI data in.
I
2
C data I/O.
RC5/SDO
RC5
SDO
16
I/O
O
ST
—
Digital I/O.
SPI data out.
RC6/TX/CK
RC6
TX
CK
17
I/O
O
I/O
ST
—
ST
Digital I/O.
EUSART asynchronous transmit.
EUSART synchronous clock (see related RX/DT).
RC7/RX/DT
RC7
RX
DT
18
I/O
I
I/O
ST
ST
ST
Digital I/O.
EUSART asynchronous receive.
EUSART synchronous data (see related TX/CK).
RE3 — — — See MCLR
/VPP/RE3 pin.
V
SS 8, 19 P — Ground reference for logic and I/O pins.
VDD 20 P — Positive supply for logic and I/O pins.
TABLE 1-2: PIC18F2525/2620 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin
Number
Pin
Type
Buffer
Type
Description
SPDIP,
SOIC
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels I = Input
O = Output P = Power
Note 1: Default assignment for CCP2 when the CCP2MX Configuration bit is set.
2: Alternate assignment for CCP2 when the CCP2MX Configuration bit is cleared.