Datasheet
2012 Microchip Technology Inc. DS30684A-page 91
PIC18(L)F2X/45K50
F9Fh IPR1 ACTIP ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 1111 1111
F9Eh PIR1 ACTIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000
F9Dh PIE1 ACTIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000
F9Ch HLVDCON VDIRMAG BGVST IRVST HLVDEN HLVDL<3:0> 0000 0000
F9Bh OSCTUNE SPLLMULT TUN<6:0> 0000 0000
F9Ah CM2CON1 MC1OUT MC2OUT C1RSEL C2RSEL C1HYS C2HYS C1SYNC C2SYNC 0000 0000
F99h CM2CON0 C2ON C2OUT C2OE C2POL C2SP C2R C2CH<1:0> 0000 1000
F98h CM1CON0 C1ON C1OUT C1OE C1POL C1SP C1R C1CH<1:0> 0000 1000
F97h CCP2CON
— — DC2B<1:0> CCP2M<3:0> --00 0000
F96h TRISE WPUE3
— — — —TRISE2
(1)
TRISE1
(1)
TRISE0
(1)
1--- -111
F95h TRISD
(1)
TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0 1111 1111
F94h TRISC TRISC7 TRISC6
— — —
TRISC2 TRISC1 TRISC0 1111 -111
F93h TRISB TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 1111 1111
F92h TRISA TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 1111 1111
F91h CCPR2H Capture/Compare/PWM Register 2, High Byte xxxx xxxx
F90h CCPR2L Capture/Compare/PWM Register 2, Low Byte xxxx xxxx
F8Fh CTMUCONH CTMUEN
— CTMUSIDL TGEN EDGEN EDGSEQEN IDISSEN CTTRIG 0-00 0000
F8Eh CTMUCONL EDG2POL EDG2SEL<1:0> EDG1POL EDG1SEL<1:0> EDG2STAT EDG1STAT 0000 00xx
F8Dh LATE
(1)
— — — — — LATE2 LATE1 LAT E 0 ---- -xxx
F8Ch LATD
(1)
LATD7 LATD6 LATD5 LATD4 LATD3 LATD2 LATD1 LATD0 xxxx xxxx
F8Bh LATC LATC7 LATC6
— — —
LATC2 LATC1 LATC0 xxxx -xxx
F8Ah LATB LATB7 LATB6 LATB5 LATB4 LATB3 LATB2 LATB1 LATB0 xxxx xxxx
F89h LATA LATA7 LATA6 LATA5 LATA4 LATA3 LATA2 LATA1 LATA0 xxxx xxxx
F88h CTMUICON ITRIM<5:0> IRNG<1:0> 0000 0000
F87h IOCC IOCC7 IOCC6 IOCC5 IOCC4
— IOCC2 IOCC1 IOCC0 0000 -000
F86h IOCB IOCB7 IOCB6 IOCB5 IOCB4
— — — — 0000 ----
F85h WPUB WPUB7 WPUB6 WPUB5 WPUB4 WPUB3 WPUB2 WPUB1 WPUB0 1111 1111
F84h
PORTE
(2)
— — — —RE3— — — ---- x---
PORTE
(1)
— — — —RE3RE2RE1RE0---- xxxx
F83h PORTD
(1)
RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0 xxxx xxxx
F82h PORTC RC7 RC6
— — — RC2 RC1 RC0 xx-- -xxx
F81h PORTB RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0 xxxx xxxx
F80h PORTA RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0 xxxx xxxx
F7Fh PMD1
— MSSPMD CTMUMD CMP2MD CMP1MD ADCMD CCP2MD CCP1MD -000 0000
F7Eh PMD0
— UARTMD USBMD ACTMD — TMR3MD TMR2MD TMR1MD -000 -000
F7Dh VREFCON0
FVREN FVRST FVRS<1:0> — — — — 0001 00--
F7Ch VREFCON1
DACEN DACLPS DACOE — DACPSS<1:0> — DACNSS 000- 00-0
F7Bh VREFCON2
— — — DACR<4:0> ---0 0000
F7Ah SLRCON
— — — SLRE SLRD SLRC SLRB SLRA ---1 1111
F79h UEP15
— — — EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F78h UEP14
— — — EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F77h UEP13
— — — EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F76h UEP12
— — — EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F75h UEP11
— — — EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F74h UEP10
— — — EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F73h UEP9
— — — EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F72h UEP8
— — — EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F71h UEP7
— — — EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F70h UEP6
— — — EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
TABLE 6-2: REGISTER FILE SUMMARY FOR PIC18(L)F2X/45K50 DEVICES (CONTINUED)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Legend: x = unknown, u = unchanged, — = unimplemented, q = value depends on condition
Note 1: PIC18(L)F45K50 devices only.
2: PIC18(L)F2XK50 devices only.