Datasheet
2012 Microchip Technology Inc. DS30684A-page 89
PIC18(L)F2X/45K50
TABLE 6-2: REGISTER FILE SUMMARY FOR PIC18(L)F2X/45K50 DEVICES
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
FFFh TOSU
— — — Top-of-Stack, Upper Byte (TOS<20:16>) ---0 0000
FFEh TOSH Top-of-Stack, High Byte (TOS<15:8>) 0000 0000
FFDh TOSL Top-of-Stack, Low Byte (TOS<7:0>) 0000 0000
FFCh STKPTR STKFUL STKUNF
—STKPTR<4:0>00-0 0000
FFBh PCLATU
— — — Holding Register for PC<20:16> ---0 0000
FFAh PCLATH Holding Register for PC<15:8> 0000 0000
FF9h PCL Holding Register for PC<7:0> 0000 0000
FF8h TBLPTRU
— — Program Memory Table Pointer Upper Byte (TBLPTR<21:16>) --00 0000
FF7h TBLPTRH Program Memory Table Pointer High Byte (TBLPTR<15:8>) 0000 0000
FF6h TBLPTRL Program Memory Table Pointer Low Byte (TBLPTR<7:0>) 0000 0000
FF5h TABLAT Program Memory Table Latch 0000 0000
FF4h PRODH Product Register, High Byte xxxx xxxx
FF3h PRODL Product Register, Low Byte xxxx xxxx
FF2h INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE IOCIE TMR0IF INT0IF IOCIF 0000 000x
FF1h INTCON2 RBPU
INTEDG0 INTEDG1 INTEDG2 —TMR0IP—IOCIP1111 -1-1
FF0h INTCON3 INT2IP INT1IP
— INT2IE INT1IE —INT2IFINT1IF11-0 0-00
FEFh INDF0 Uses contents of FSR0 to address data memory – value of FSR0 not changed (not a physical register) ---- ----
FEEh POSTINC0 Uses contents of FSR0 to address data memory – value of FSR0 post-incremented (not a physical register) ---- ----
FEDh POSTDEC0 Uses contents of FSR0 to address data memory – value of FSR0 post-decremented (not a physical register) ---- ----
FECh PREINC0 Uses contents of FSR0 to address data memory – value of FSR0 pre-incremented (not a physical register) ---- ----
FEBh PLUSW0 Uses contents of FSR0 to address data memory – value of FSR0 pre-incremented (not a physical register) –
value of FSR0 offset by W
---- ----
FEAh FSR0H
— — — — Indirect Data Memory Address Pointer 0, High Byte ---- 0000
FE9h FSR0L Indirect Data Memory Address Pointer 0, Low Byte xxxx xxxx
FE8h WREG Working Register xxxx xxxx
FE7h INDF1
Uses contents of FSR1 to address data memory – value of FSR1 not changed (not a physical register)
---- ----
FE6h POSTINC1 Uses contents of FSR1 to address data memory – value of FSR1 post-incremented (not a physical register) ---- ----
FE5h POSTDEC1 Uses contents of FSR1 to address data memory – value of FSR1 post-incremented (not a physical register) ---- ----
FE4h PREINC1 Uses contents of FSR1 to address data memory – value of FSR1 pre-incremented (not a physical register) ---- ----
FE3h PLUSW1 Uses contents of FSR1 to address data memory – value of FSR1 pre-incremented (not a physical register) –
value of FSR1 offset by W
---- ----
FE2h FSR1H
— — — — Indirect Data Memory Address Pointer 1, High Byte ---- 0000
FE1h FSR1L Indirect Data Memory Address Pointer 1, Low Byte xxxx xxxx
FE0h BSR
— — — — Bank Select Register ---- 0000
FDFh INDF2 Uses contents of FSR2 to address data memory – value of FSR2 not changed (not a physical register) ---- ----
FDEh POSTINC2 Uses contents of FSR2 to address data memory – value of FSR2 post-incremented (not a physical register) ---- ----
FDDh POSTDEC2 Uses contents of FSR2 to address data memory – value of FSR2 post-decremented (not a physical register) ---- ----
FDCh PREINC2
Uses contents of FSR2 to address data memory – value of FSR2 pre-incremented (not a physical register) ---- ----
FDBh PLUSW2 Uses contents of FSR2 to address data memory – value of FSR2 pre-incremented (not a physical register) –
value of FSR2 offset by W
---- ----
FDAh FSR2H
— — — — Indirect Data Memory Address Pointer 2, High Byte ---- 0000
FD9h FSR2L Indirect Data Memory Address Pointer 2, Low Byte xxxx xxxx
FD8h STATUS
— — —NOVZDCC---x xxxx
FD7h TMR0H Timer0 Register, High Byte 0000 0000
FD6h TMR0L Timer0 Register, Low Byte xxxx xxxx
FD5h T0CON TMR0ON T08BIT T0CS T0SE PSA T0PS<2:0> 1111 1111
FD3h OSCCON IDLEN IRCF<2:0> OSTS HFIOFS SCS<1:0> 0011 q000
FD2h OSCCON2
PLLRDY SOSCRUN INTSRC PLLEN SOSCGO PRISD HFIOFR LFIOFS 0000 0100
FD1h WDTCON
— — — — — — —SWDTEN---- ---0
FD0h RCON IPEN SBOREN — RI
TO PD POR BOR 01-1 1100
Legend: x = unknown, u = unchanged, — = unimplemented, q = value depends on condition
Note 1: PIC18(L)F45K50 devices only.
2: PIC18(L)F2XK50 devices only.