Datasheet

 2012 Microchip Technology Inc. DS30684A-page 77
PIC18(L)F2X/45K50
6.0 MEMORY ORGANIZATION
There are three types of memory in PIC18 Enhanced
microcontroller devices:
• Program Memory
• Data RAM
• Data EEPROM
As Harvard architecture devices, the data and program
memories use separate buses; this allows for
concurrent access of the two memory spaces. The data
EEPROM, for practical purposes, can be regarded as
a peripheral device, since it is addressed and accessed
through a set of control registers.
Additional detailed information on the operation of the
Flash program memory is provided in Section 7.0
“Flash Program Memory”. Data EEPROM is
discussed separately in Section 8.0 “Data EEPROM
Memory”.
6.1 Program Memory Organization
PIC18 microcontrollers implement a 21-bit program
counter, which is capable of addressing a 2-Mbyte
program memory space. Accessing a location between
the upper boundary of the physically implemented
memory and the 2-Mbyte address will return all ‘0’s (a
NOP instruction).
This family of devices contain the following:
• PIC18(L)F24K50: 16 Kbytes of Flash memory, up
to 8,192 single-word instructions
• PIC18(L)F25K50, PIC18(L)F45K50: 32 Kbytes of
Flash memory, up to 16,384 single-word
instructions
PIC18 devices have two interrupt vectors. The Reset
vector address is at 0000h and the interrupt vector
addresses are at 0008h and 0018h.
The program memory map for PIC18(L)F2X/45K50
devices is shown in Figure 6-1. Memory block details
are shown in Figure 21-2.
FIGURE 6-1: PROGRAM MEMORY MAP AND STACK FOR PIC18(L)F2X/45K50 DEVICES
PC<20:0>
Stack Level 1

Stack Level 31
Reset Vector
Low Priority Interrupt Vector


CALL,RCALL,RETURN
RETFIE,RETLW
21
0000h
0018h
On-Chip
Program Memory
High Priority Interrupt Vector
0008h
User Memory Space
1FFFFFh
4000h
3FFFh
Read ‘0’
200000h
8000h
7FFFh
On-Chip
Program Memory
Read ‘0’
PIC18(L)F25K50
PIC18(L)F45K50
PIC18(L)F24K50