Datasheet

 2012 Microchip Technology Inc. DS30684A-page 73
PIC18(L)F2X/45K50
FIGURE 5-5: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED TO VDD): CASE 2
FIGURE 5-6: SLOW RISE TIME (MCLR
TIED TO VDD, VDD RISE > TPWRT)
VDD
MCLR
INTERNAL POR
PWRT TIME-OUT
OST TIME-OUT
INTERNAL RESET
TPWRT
TOST
VDD
MCLR
INTERNAL POR
PWRT TIME-OUT
OST TIME-OUT
INTERNAL RESET
0V
5V
T
PWRT
TOST