Datasheet

PIC18(L)F2X/45K50
DS30684A-page 48  2012 Microchip Technology Inc.
FIGURE 3-10: FSCM TIMING DIAGRAM
OSCFIF
System
Clock
Output
Sample Clock
Failure
Detected
Oscillator
Failure
Note: The system clock is normally at a much higher frequency than the sample clock. The relative frequencies in
this example have been chosen for clarity.
(Q)
Test
Test Test
Clock Monitor Output
TABLE 3-4: REGISTERS ASSOCIATED WITH CLOCK SOURCES
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on page
INTCON GIE/GIEH PEIE/GIEL
TMR0IE INT0IE IOCIE TMR0IF INT0IF IOCIF 120
IPR2 OSCFIP C1IP C2IP EEIP BCLIP HLVDIP TMR3IP CCP2IP 130
OSCCON IDLEN IRCF<2:0> OSTS HFIOFS SCS<1:0> 35
OSCCON2 PLLRDY SOSCRUN
INTSRC PLLEN SOSCGO PRISD HFIOFR LFIOFS 36
OSCTUNE SPLLMULT TUN<6:0> 40
PIE2 OSCFIE C1IE C2IE EEIE BCLIE HLVDIE TMR3IE CCP2IE 127
PIR2 OSCFIF
C1IF C2IF EEIF BCLIF HLVDIF TMR3IF CCP2IF 124
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used by clock sources.
TABLE 3-5: CONFIGURATION REGISTERS ASSOCIATED WITH CLOCK SOURCES
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on page
CONFIG1H IESO FCMEN PCLKEN
—FOSC<3:0>388
CONFIG2L
— LPBOR — BORV<1:0> BOREN<1:0> PWRTEN
389
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for clock sources.