Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller SSOP 28 8-Bit 48 MHz I/O number 25

PIC18(L)F2X/45K50

DS30684A-page 40  2012 Microchip Technology Inc.

3.6.1.1 OSCTUNE Register

The HFINTOSC oscillator circuits are factory calibrated

but can be adjusted in software by writing to the

TUN<6:0> bits of the OSCTUNE register (Register 3-

3).

The default value of the TUN<6:0> is ‘0’. The value is a

7-bit two’s complement number.

When the OSCTUNE register is modified, the

HFINTOSC frequency will begin shifting to the new

frequency. Code execution continues during this shift.

There is no indication that the shift has occurred.

The TUN<6:0> bits in OSCTUNE do not affect the

INTRC frequency. Operation of features that depend on

the INTRC clock source frequency, such as the Power-

up Timer (PWRT), Watchdog Timer (WDT), Fail-Safe

Clock Monitor (FSCM) and peripherals, are not affected

by the change in frequency.

The OSCTUNE register also implements the

SPLLMULT bit, which controls whether 3x or 4xPLL

clock multiplication is used when the PLL is enabled

dynamically in software. For more details about the

function of the SPLLMULT bit see Section 3.8.2 “PLL

in HFINTOSC Modes”.

3.7 Register Definitions: Oscillator Tuning

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

SPLLMULT TUN<6:0>

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 7 SPLLMULT: Software PLL Multiplier Select bit

If PLL Enabled, SPLLMULT changes are ignored.

Else,

Selects which PLL multiplier will be used:

1 = 3xPLL is selected

0 = 4xPLL is selected

bit 6-0 TUN<6:0>: Frequency Tuning bits – affects HFINTOSC

(1)

0111111 = Maximum frequency

0111110 =

• • •

0000001 =

0000000 = Center frequency. Oscillator module is running at the factory calibrated frequency.

1111111 =

• • •

1000000 = Minimum frequency

Note 1: The TUN<6:0> bits may be supplied and controlled by the Active Clock Tuning module (see Section 3.15

“Active Clock Tuning (ACT) Module”) When the Active Clock Tuning is enabled, the TUN<6:0> bits are

read-only.