Datasheet
2012 Microchip Technology Inc. DS30684A-page 399
PIC18(L)F2X/45K50
26.3.1 CONTROL REGISTER
Register 26-15 shows the WDTCON register. This is a
readable and writable register which contains a control
bit that allows software to override the WDT enable
Configuration bit, but only if the Configuration bit has
disabled the WDT.
26.4 Register Definitions: WDT Control
TABLE 26-4: CONFIGURATION REGISTERS ASSOCIATED WITH WATCHDOG TIMER
REGISTER 26-15: WDTCON: WATCHDOG TIMER CONTROL REGISTER
U-0 U-0 U-0 U-0 U-0 U-0 U-0 R/W-0
— — — — — — —SWDTEN
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-1 Unimplemented: Read as ‘0’
bit 0 SWDTEN: Software Enable or Disable the Watchdog Timer bit
(1)
1 = WDT is turned on
0 = WDT is turned off (Reset value)
Note 1: This bit has no effect unless the Configuration bit, WDTEN<1:0>, is set to 10b (SWDTEN enabled).
TABLE 26-3: REGISTERS ASSOCIATED WITH WATCHDOG TIMER
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on page
RCON IPEN SBOREN — RI TO PD POR BOR 68
WDTCON — — — — — — —SWDTEN399
Legend: — = unimplemented, read as ‘0’. Shaded bits are not used by the Watchdog Timer.
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on page
CONFIG2H
— — WDTPS<3:0> WDTEN<1:0> 390
Legend: — = unimplemented, read as ‘0’. Shaded bits are not used by the Watchdog Timer.