Datasheet

2012 Microchip Technology Inc. DS30684A-page 337
PIC18(L)F2X/45K50
REGISTER 20-3: CTMUICON: CTMU CURRENT CONTROL REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
ITRIM<5:0> IRNG<1:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set 0’ = Bit is cleared x = Bit is unknown
bit 7-2 ITRIM<5:0>: Current Source Trim bits
011111 = Maximum positive change from nominal current
011110
.
.
.
000001 = Minimum positive change from nominal current
000000 = Nominal current output specified by IRNG<1:0>
111111 = Minimum negative change from nominal current
.
.
.
100010
100001 = Maximum negative change from nominal current
bit 1-0 IRNG<1:0>: Current Source Range Select bits (see Tabl e 2 9- 4 )
11 = 100 Base current
10 = 10 Base current
01 = Base current level
00 = Current source disabled
TABLE 20-1: REGISTERS ASSOCIATED WITH CTMU MODULE
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on page
CTMUCONH CTMUEN
CTMUSIDL TGEN EDGEN EDGSEQEN IDISSEN CTTRIG 335
CTMUCONL EDG2POL EDG2SEL<1:0> EDG1POL EDG1SEL<1:0> EDG2STAT EDG1STAT
336
CTMUICON ITRIM<5:0> IRNG<1:0>
337
IPR3
CTMUIP
USBIP TMR3GIP TMR1GIP
131
PIE3
CTMUIE
USBIE TMR3GIE TMR1GIE
128
PIR3
CTMUIF
USBIF TMR3GIF TMR1GIF
125
PMD1
MSSPMD
CTMUMD
CMP2MD
CMP1MD ADCMD CCP2MD CCP1MD
65
Legend: — = Unimplemented, read as ‘0’. Shaded bits are not used during CTMU operation.