Datasheet

PIC18(L)F2X/45K50
DS30684A-page 312  2012 Microchip Technology Inc.
TABLE 18-3: CONFIGURATION REGISTERS ASSOCIATED WITH THE ADC MODULE
TABLE 18-2: REGISTERS ASSOCIATED WITH A/D OPERATION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on page
ADCON0
— CHS<4:0> GO/DONE ADON 306
ADCON1 TRIGSEL
— — — PVCFG<1:0> NVCFG<1:0> 307
ADCON2 ADFM
— ACQT<2:0> ADCS<2:0> 308
ADRESH A/D Result, High Byte 309
ADRESL A/D Result, Low Byte 309
ANSELA
— —ANSA5— ANSA3 ANSA2 ANSA1 ANSA0 154
ANSELB
— — ANSB5 ANSB4 ANSB3 ANSB2 ANSB1 ANSB0 155
ANSELC ANSC7 ANSC6
— — — ANSC2 — — 155
ANSELD
(1)
ANSD7 ANSD6 ANSD5 ANSD4 ANSD3 ANSD2 ANSD1 ANSD0 155
ANSELE
(1)
— — — — — ANSE2 ANSE1 ANSE0 156
CTMUCONH
CTMUEN — CTMUSIDL TGEN EDGEN EDGSEQEN IDISSEN CTTRIG 335
INTCON GIE/GIEH PEIE/GIEL
TMR0IE INT0IE IOCIE TMR0IF INT0IF IOCIF 120
IPR1
ACTIP ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 129
PIE1
ACTIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 126
PIR1
ACTIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 123
PMD1
— MSSPMD CTMUMD CMP2MD CMP1MD ADCMD CCP2MD CCP1MD 65
TRISA
TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 156
TRISB
TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 156
TRISC TRISC7 TRISC6
— — —TRISC2TRISC1 TRISC0 156
TRISD
(1)
TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0 156
TRISE
WPUE3 — — — — TRISE2
(1)
TRISE1
(1)
TRISE0
(1)
156
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used by this module.
Note 1: Available on
PIC18(L)F45K50 devices.
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on page
CONFIG3H
MCLRE SDOMX
—
T3CMX — — PBADEN CCP2MX 391
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used by the ADC module.