Datasheet

 2012 Microchip Technology Inc. DS30684A-page 23
PIC18(L)F2X/45K50
82523RE0/AN5
RE0 I/O ST/DIG Digital I/O.
AN5 I Analog Analog input 5.
92624
RE1/AN6
RE1 I/O ST/DIG Digital I/O.
AN6 I Analog Analog input 6.
10 27 25 RE2/AN7
RE2 I/O ST Digital I/O.
AN7 I Analog Analog input 7.
11816
RE3/VPP/MCLR
RE3 I ST Digital input.
V
PP P Programming voltage input.
MCLR
I ST Active-low Master Clear (device Reset) input.
— 12 — ICCK/ICPGC
ICCK I/O ST Dedicated In-Circuit Debugger clock.
ICPGC
(3)
I/O ST Dedicated ICSP™ programming clock.
— 13 — ICDT/ICPGD
ICDT I/O ST Dedicated In-Circuit Debugger data.
ICPGD
(3)
I/O ST Dedicated ICSP™ programming data.
— 33 — ICRST
/ICVPP
ICRST I ST Dedicated Master Clear Reset input.
ICV
PP
(3)
I P Dedicated programming voltage input.
11,32 7, 28 7, 26 V
DD P — Positive supply for logic and I/O pins.
12,31 6, 29 6, 27 V
SS P — Ground reference for logic and I/O pins.
34 NC
TABLE 1-3: PIC18(L)F45K50 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
Pin
Type
Buffer
Type
Description
PDIP TQFP UQFN
Legend: TTL = TTL compatible input; CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;
I = Input; O = Output; P = Power.
Note 1: Default pin assignment for SDO, T3CKI and CCP2 when Configuration bits SDOMX, T3CMX and CCP2MX are set.
2: Alternate pin assignment for SDO, T3CKI and CCP2 when Configuration bits SDOMX, T3CMX and CCP2MX are clear.
3: Pin is “No Connect”, except on PIC18(L)F45K50 TQFP devices with ICPRT Configuration bit set.