Datasheet

PIC18(L)F2X/45K50
DS30684A-page 22  2012 Microchip Technology Inc.
25 44 40 RC6/IOCC6/TX/CK/AN18
RC6 I/O ST/DIG Digital I/O.
IOCC6 I TTL Interrupt-on-change pin.
TX O — EUSART asynchronous transmit.
CK I/O ST EUSART synchronous clock (see related RX/DT).
AN18 I Analog Analog input 18.
26 1 1
RC7/RX/DT/SDO/IOCC7/AN19
RC7 I/O ST/DIG Digital I/O.
RX I ST EUSART asynchronous receive.
DT I/O ST EUSART synchronous data (see related TX/CK).
SDO
(2)
O DIG Alternate SPI data out (MSSP).
IOCC7 I TTL Interrupt-on-change pin.
AN19 I Analog Analog input 19.
19 38 34 RD0/AN20
RD0 I/O ST/DIG Digital I/O.
AN20 I Analog Analog input 20.
20 39 35
RD1/AN21
RD1 I/O ST/DIG Digital I/O.
AN21 I Analog Analog input 21.
21 40 36 RD2/AN22
RD2 I/O ST/DIG Digital I/O
AN22 I Analog Analog input 22.
22 41 37
RD3/AN23
RD3 I/O ST/DIG Digital I/O.
AN23 I Analog Analog input 23.
27 2 2
RD4/AN24
RD4 I/O ST/DIG Digital I/O.
AN24 I Analog Analog input 24.
28 3 3
RD5/P1B/AN25
RD5 I/O ST/DIG Digital I/O.
P1B O DIG Enhanced CCP1 PWM output.
AN25 I Analog Analog input 25.
29 4 4
RD6/P1C/AN26
RD6 I/O ST/DIG Digital I/O.
P1C O DIG Enhanced CCP1 PWM output.
AN26 I Analog Analog input 26.
30 5 5
RD7/P1D/AN27
RD7 I/O ST/DIG Digital I/O.
P1D O DIG Enhanced CCP1 PWM output.
AN27 I Analog Analog input 27.
TABLE 1-3: PIC18(L)F45K50 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
Pin
Type
Buffer
Type
Description
PDIP TQFP UQFN
Legend: TTL = TTL compatible input; CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;
I = Input; O = Output; P = Power.
Note 1: Default pin assignment for SDO, T3CKI and CCP2 when Configuration bits SDOMX, T3CMX and CCP2MX are set.
2: Alternate pin assignment for SDO, T3CKI and CCP2 when Configuration bits SDOMX, T3CMX and CCP2MX are clear.
3: Pin is “No Connect”, except on PIC18(L)F45K50 TQFP devices with ICPRT Configuration bit set.