Datasheet

 2012 Microchip Technology Inc. DS30684A-page 205
PIC18(L)F2X/45K50
TABLE 15-12: REGISTERS ASSOCIATED WITH ENHANCED PWM
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register on
page
ECCP1AS ECCP1ASE ECCP1AS<2:0> PSS1AC<1:0> PSS1BD<1:0> 210
CCP1CON P1M<1:0> DC1B<1:0> CCP1M<3:0> 206
CCPTMRS
— — — —C2TSEL— — C1TSEL 209
INTCON GIE/GIEH PEIE/GIEL
TMR0IE INT0IE IOCIE TMR0IF INT0IF IOCIF 120
IPR1
ACTIP ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 129
IPR2
OSCFIP C1IP C2IP EEIP BCLIP HLVDIP TMR3IP CCP2IP 130
PIE1
ACTIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 126
PIE2
OSCFIE C1IE C2IE EEIE BCLIE HLVDIE TMR3IE CCP2IE 127
PIR1
ACTIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 123
PIR2
OSCFIF C1IF C2IF EEIF BCLIF HLVDIF TMR3IF CCP2IF 124
PMD0
— UARTMD USBMD ACTMD — TMR3MD TMR2MD TMR1MD 64
PMD1
— MSSPMD CTMUMD CMP2MD CMP1MD ADCMD CCP2MD CCP1MD 65
PR2 Timer2 Period Register —
PSTR1CON
— — — STR1SYNC STR1D STR1C STR1B STR1A 211
PWM1CON P1RSEN P1DC<6:0> 211
T2CON
— T2OUTPS<3:0> TMR2ON T2CKPS<1:0> 179
TMR2 Timer2 Period Register —
TRISB
TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 156
TRISC
TRISC7 TRISC6 — — —TRISC2TRISC1 TRISC0 156
TRISD
(1)
TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0 156
Legend: — = Unimplemented location, read as ‘0’. Shaded bits are not used by Capture mode.
Note 1: These registers/bits are available on PIC18(L)F45K50 devices.