Datasheet
2012 Microchip Technology Inc. DS30684A-page 181
PIC18(L)F2X/45K50
15.0 CAPTURE/COMPARE/PWM
MODULES
The Capture/Compare/PWM module is a peripheral
which allows the user to time and control different
events, and to generate Pulse-Width Modulation
(PWM) signals. In Capture mode, the peripheral allows
the timing of the duration of an event. The Compare
mode allows the user to trigger an external event when
a predetermined amount of time has expired. The
PWM mode can generate Pulse-Width Modulated
signals of varying frequency and duty cycle.
This family of devices contains one Enhanced Capture/
Compare/PWM module (ECCP1) and one standard
Capture/Compare/PWM module (CCP2).
The Capture and Compare functions are identical for
the CCP/ECCP modules. The difference between CCP
and ECCP modules are in the Pulse-Width Modulation
(PWM) function. In CCP modules, the standard PWM
function is identical. In ECCP modules, the Enhanced
PWM function has either full-bridge or half-bridge PWM
output. Full-bridge ECCP modules have four available
I/O pins while half-bridge ECCP modules only have two
available I/O pins. ECCP PWM modules are backward
compatible with CCP PWM modules and can be
configured as standard PWM modules.
15.1 Capture Mode
The Capture mode function described in this section is
identical for all CCP and ECCP modules available on
this device family.
Capture mode makes use of the 16-bit Timer
resources, Timer1 and Timer3. The timer resources for
each CCP capture function are independent and are
selected using the CCPTMRS register. When an event
occurs on the CCPx pin, the 16-bit CCPRxH:CCPRxL
register pair captures and stores the 16-bit value of the
TMRxH:TMRxL register pair, respectively. An event is
defined as one of the following and is configured by the
CCPxM<3:0> bits of the CCPxCON register:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
When a capture is made, the corresponding Interrupt
Request Flag bit CCPxIF of the PIR1 and PIR2 register
is set. The interrupt flag must be cleared in software. If
another capture occurs before the value in the
CCPRxH:CCPRxL register pair is read, the old
captured value is overwritten by the new captured
value.
Figure 15-1 shows a simplified diagram of the Capture
operation.
FIGURE 15-1: CAPTURE MODE
OPERATION BLOCK
DIAGRAM
Note 1: In devices with more than one CCP
module, it is very important to pay close
attention to the register names used. A
number placed after the module acronym
is used to distinguish between separate
modules. For example, the CCP1CON
and CCP2CON control the same
operational aspects of two completely
different CCP modules.
2: Throughout this section, generic
references to a CCP module in any of its
operating modes may be interpreted as
being equally applicable to ECCP1 and
CCP2. Register names, module signals,
I/O pins and bit names may use the
generic designator ‘x’ to indicate the use of
a numeral to distinguish a particular
module, when required.
CCPRxH CCPRxL
TMRxH TMRxL
Set Flag bit CCPxIF
(PIRx register)
Capture
Enable
CCPxM<3:0>
Prescaler
1, 4, 16
and
Edge Detect
pin
CCPx
System Clock (F
OSC)