Datasheet

PIC18(L)F2X/45K50
DS30684A-page 18  2012 Microchip Technology Inc.
13 10 RC2/CTPLS/P1A/CCP1/IOCC2/AN14
RC2 I/O ST/DIG Digital I/O.
CTPLS O DIG CTMU pulse generator output.
P1A O DIG Enhanced CCP1 PWM output.
CCP1 I/O ST/DIG Capture 1 input/Compare 1 output/PWM 1 output.
IOCC2 I TTL Interrupt-on-change pin.
AN14 I Analog Analog input 14.
14 11
VUSB3V3
VUSB3V3 P — Internal 3.3V voltage regulator output, positive supply
for USB transceiver.
15 12
D-/IOCC4
D- I/O — USB differential minus line input/output.
IOCC4 I ST Interrupt-on-change pin.
16 13
D+/IOCC5
D+ I/O — USB differential plus line input/output.
IOCC5 I ST Interrupt-on-change pin.
17 14
RC6/IOCC6/TX/CK/AN18
RC6 I/O ST/DIG Digital I/O.
IOCC6 I TTL Interrupt-on-change pin.
TX O DIG EUSART asynchronous transmit.
CK I/O ST EUSART synchronous clock (see related RX/DT).
AN18 I Analog Analog input 18.
18 15
RC7/SDO/IOCC7/RX/DT/AN19
RC7 I/O ST/DIG Digital I/O.
SDO
(2)
O DIG Alternate SPI data out pin assignment (MSSP).
IOCC7 I TTL Interrupt-on-change pin.
RX I ST EUSART asynchronous receive.
DT I/O ST/DIG EUSART synchronous data (see related TX/CK).
AN19 I Analog Analog input 19.
1 26 RE3/VPP/MCLR
RE3 I ST Digital input.
V
PP P Programming voltage input.
MCLR I ST Active-Low Master Clear (device Reset) input.
20 17 V
DD P — Positive supply for logic and I/O pins.
8, 19 5, 16 V
SS P — Ground reference for logic and I/O pins.
TABLE 1-2: PIC18(L)F2XK50 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
Pin
Type
Buffer
Type
Description
PDIP,
SOIC,
SSOP
QFN
Legend: TTL = TTL compatible input; CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;
I = Input; O = Output; P = Power.
Note 1: Default pin assignment for SDO, T3CKI and CCP2 when Configuration bits SDOMX, T3CMX and CCP2MX are set.
2: Alternate pin assignment for SDO, T3CKI and CCP2 when Configuration bits SDOMX, T3CMX and CCP2MX are clear.