Datasheet

PIC18(L)F2X/45K50
DS30684A-page 16  2012 Microchip Technology Inc.
9 6 RA7/CLKI/OSC1
RA7 I/O TTL/DIG Digital I/O.
CLKI I CMOS External clock source input. Always associated with
pin function OSC1.
OSC1 I ST Oscillator crystal input or external clock source input
ST buffer when configured in RC mode; CMOS
otherwise.
21 18
RB0/INT0/FLT0/SRI/SDI/SDA/AN12
RB0 I/O TTL/DIG Digital Output or Input with internal pull-up option.
INT0 I ST External interrupt 0.
FLT0
I ST PWM Fault input for ECCP auto-shutdown.
SRI I ST SR latch input.
SDI I ST SPI data in (MSSP).
SDA I/O I
2
C™ I
2
C™ data I/O (MSSP).
AN12 I Analog Analog input 12.
22 19
RB1/INT1/P1C/SCK/SCL/C12IN3-/AN10
RB1 I/O TTL/DIG Digital Output or Input with internal pull-up option.
INT1 I ST External interrupt 1.
P1C O DIG Enhanced CCP1 PWM output.
SCK I/O ST/DIG Synchronous serial clock input/output for SPI mode
(MSSP).
SCL I/O I
2
C™ Synchronous serial clock input/output for I
2
C™ mode
(MSSP).
C12IN3- I Analog Comparators C1 and C2 inverting input.
AN10 I Analog Analog input 10.
23 20
RB2/INT2/CTED1/P1B/AN8
RB2 I/O TTL/DIG Digital Output or Input with internal pull-up option.
INT2 I ST External interrupt 2.
CTED1 I ST CTMU Edge 1 input.
P1B O DIG Enhanced CCP1 PWM output.
AN8 I Analog Analog input 8.
24 21
RB3/CTED2/CCP2/SDO/C12IN2-/AN9
RB3 I/O TTL/DIG Digital Output or Input with internal pull-up option.
CTED2 I ST CTMU Edge 2 input.
CCP2
(2)
I/O ST/DIG Alternate Capture 2 input/Compare 2 output/PWM 2
output.
SDO
(1)
O DIG SPI data out (MSSP).
C12IN2- I Analog Comparators C1 and C2 inverting input.
AN9 I Analog Analog input 9.
TABLE 1-2: PIC18(L)F2XK50 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
Pin
Type
Buffer
Type
Description
PDIP,
SOIC,
SSOP
QFN
Legend: TTL = TTL compatible input; CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;
I = Input; O = Output; P = Power.
Note 1: Default pin assignment for SDO, T3CKI and CCP2 when Configuration bits SDOMX, T3CMX and CCP2MX are set.
2: Alternate pin assignment for SDO, T3CKI and CCP2 when Configuration bits SDOMX, T3CMX and CCP2MX are clear.