Datasheet

 2012 Microchip Technology Inc. DS30684A-page 137
PIC18(L)F2X/45K50
RA7/CLKI/OSC1 RA7 0 — O DIG LATA<7> data output; disabled in external oscillator modes.
1 — I TTL PORTA<7> data input; disabled in external oscillator
modes.
CLKI x — I AN External clock source input; always associated with pin
function OSC1.
OSC1 x — I XTAL Oscillator crystal input or external clock source input ST
buffer when configured in RC mode; CMOS otherwise.
TABLE 11-1: PORTA I/O SUMMARY (CONTINUED)
Pin Name Function
TRIS
Setting
ANSEL
Setting
Pin
Type
Buffer
Type
Description
Legend: AN = Analog input or output; TTL = TTL compatible input; HV = High Voltage; OD = Open Drain; XTAL = Crystal;
CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels; I
2
C
TM
= Schmitt Trigger input
with I
2
C.
TABLE 11-2: REGISTERS ASSOCIATED WITH PORTA
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on page
ANSELA
— — ANSA5 — ANSA3 ANSA2 ANSA1 ANSA0 154
CM1CON0 C1ON C1OUT C1OE C1POL C1SP C1R C1CH<1:0> 319
CM2CON0 C2ON C2OUT C2OE
C2POL C2SP C2R C2CH<1:0> 319
VREFCON1 DACEN DACLPS DACOE — DACPSS<1:0> — DACNSS 349
VREFCON2 — — — DACR<4:0> 350
HLVDCON
VDIRMAG BGVST IRVST HLVDEN HLVDL<3:0> 379
PORTA RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0 153
LATA LATA7 LATA6 LATA5 LATA4 LATA3 LATA2 LATA1 LATA0 157
SLRCON
— — — SLRE SLRD SLRC SLRB SLRA 159
SRCON0 SRLEN SRCLK<2:0> SRQEN SRNQEN SRPS SRPR 342
SSP1CON1 WCOL SSPOV SSPEN CKP SSPM<3:0> 262
T0CON
TMR0ON T08BIT T0CS T0SE PSA T0PS<2:0> 161
TRISA TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 156
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for PORTA.
TABLE 11-3: CONFIGURATION REGISTERS ASSOCIATED WITH PORTA
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on page
CONFIG1H
IESO FCMEN PCLKEN —FOSC<3:0>388
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for PORTA.