Datasheet

 2012 Microchip Technology Inc. DS30684A-page 125
PIC18(L)F2X/45K50
REGISTER 10-6: PIR3: PERIPHERAL INTERRUPT (FLAG) REGISTER 3
U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0
— — — — CTMUIF USBIF TMR3GIF TMR1GIF
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-4 Unimplemented: Read as ‘0’
bit 3 CTMUIF: CTMU Interrupt Flag bit
1 = CTMU interrupt occurred (must be cleared in software)
0 = No CTMU interrupt occurred
bit 2 USBIF: USB Interrupt Flag bit
1 = USB requested an interrupt (must be cleared in software)
0 = No USB interrupt request
bit 1 TMR3GIF: TMR3 Gate Interrupt Flag bit
1 = TMR gate interrupt occurred (must be cleared in software)
0 = No TMR gate occurred
bit 0 TMR1GIF: TMR1 Gate Interrupt Flag bit
1 = TMR gate interrupt occurred (must be cleared in software)
0 = No TMR gate occurred