Datasheet

© 2009 Microchip Technology Inc. DS80366G-page 7
PIC18F24/25/44/45K20
27. Module: PORTB
Setting a PORTB Interrupt-on-change enable bit of
the IOCB register while the corresponding PORTB
input is high will cause an RBIF interrupt.
Work around
Set the IOCB bits to the desired configuration then
read PORTB to clear the mismatch latches.
Finally, clear the RBIF bit before setting the RBIE
bit.
Affected Silicon Revisions
28. Module: ADC
After extended stress the Most Significant bit
(MSb) of the ADC conversion result can become
stuck at ‘0’. Conversions resulting in code 511 or
less are still accurate, but conversions that
should result in codes greater than 511 are
instead pinned at 511.
The potential for failures is a function of several
factors:
• The potential for failures increases over the life
of the part. No failures have ever been seen for
accelerated stress estimated to be equivalent
to 34 years at room temperature. The failure
rate after accelerated stress estimated to be
equivalent to 146 years at room temperature
can be as high as 10% for V
DD = 1.8V. The time
to failure will decrease as the operating temper-
ature increases.
• The potential for failures is highest at low V
DD
and decreases as V
DD increases.
• The potential for failures depends on the set-
tings of the ADCW<2:0> and ACQT<2:0> bits
in ADCON2:
Work around
1. Restrict the input voltage to less than 1/2 of the
ADC voltage reference so that the expected
result is always a code less than or equal to 511.
2. Use manual acquisition time (ACQT<2:0> =
000) and use the ADC’s dedicated internal oscil-
lator as the conversion clock source
(ADCS<2:0>) = 011 or 111).
3. Use manual acquisition time (ACQT<2:0> =
000) and put the part to Sleep after each
conversion.
Affected Silicon Revisions
A4 A7 A9 AB
XXX
X
ADCS<2:0> ACQT<2:0> = 000 ACQT<2:0> ≠ 000
011 or 111 No Failures Low Probability
000 Very Low
Probability
Low Probability
001, 010,
100, 101, or
110
Moderate
Probability
Moderate
Probability
A4 A7 A9 AB
XXX
X