Datasheet

© 2009 Microchip Technology Inc. DS39682E-page 329
PIC18F45J10 FAMILY
FIGURE 24-14: I
2
C™ BUS START/STOP BITS TIMING
TABLE 24-18: I
2
C™ BUS START/STOP BITS REQUIREMENTS (SLAVE MODE)
FIGURE 24-15: I
2
C™ BUS DATA TIMING
Param.
No.
Symbol Characteristic Min Max Units Conditions
90 T
SU:STA Start Condition 100 kHz mode 4700 — ns Only relevant for Repeated
Start condition
Setup Time 400 kHz mode 600 —
91 THD:STA Start Condition 100 kHz mode 4000 — ns After this period, the first
clock pulse is generated
Hold Time 400 kHz mode 600 —
92 T
SU:STO Stop Condition 100 kHz mode 4700 — ns
Setup Time 400 kHz mode 600 —
93 T
HD:STO Stop Condition 100 kHz mode 4000 — ns
Hold Time 400 kHz mode 600 —
Note: Refer to Figure 24-3 for load conditions.
91
92
93
SCLx
SDAx
Start
Condition
Stop
Condition
90
Note: Refer to Figure 24-3 for load conditions.
90
91 92
100
101
103
106
107
109
109
110
102
SCLx
SDAx
In
SDAx
Out