Datasheet

© 2009 Microchip Technology Inc. DS39682E-page 313
PIC18F45J10 FAMILY
24.3 DC Characteristics: PIC18F45J10 Family (Industrial)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C ≤ T
A ≤ +85°C for industrial
Param
No.
Symbol Characteristic Min Max Units Conditions
V
IL Input Low Voltage
All I/O Ports:
D030 with TTL Buffer V
SS 0.15 VDD VVDD < 3.3V
D030A — 0.8 V 3.3V ≤ VDD ≤ 3.6V
D031 with Schmitt Trigger Buffer V
SS 0.2 VDD V
D032 MCLR
VSS 0.2 VDD V
D033 OSC1 V
SS 0.3 VDD V HS, HSPLL modes
D033A
D034
OSC1
T1CKI
VSS
VSS
0.2 VDD
0.3
V
V
EC, ECPLL modes
(1)
VIH Input High Voltage
I/O Ports with non 5.5V
Tol eranc e:
(4)
D040 with TTL Buffer 0.25 VDD + 0.8V VDD VVDD < 3.3V
D040A 2.0 VDD V3.3V ≤ VDD ≤ 3.6V
D041 with Schmitt Trigger Buffer 0.8 V
DD VDD V
I/O Ports with 5.5V
Tol eranc e:
(4)
Dxxx with TTL Buffer 0.25 VDD + 0.8V 5.5 V VDD < 3.3V
DxxxA 2.0 5.5 V 3.3V ≤ VDD ≤ 3.6V
Dxxx with Schmitt Trigger Buffer 0.8 VDD 5.5 V
D042 MCLR
0.8 VDD VDD V
D043 OSC1 0.7 VDD VDD V HS, HSPLL modes
D043A
D044
OSC1
T1CKI
0.8 V
DD
1.6
V
DD
VDD
V
V
EC, ECPLL modes
I
IL Input Leakage Current
(2,3)
D060 I/O Ports with non 5.5V
Tol eranc e
(4)
— ±0.2 μAVSS ≤ VPIN ≤ VDD,
Pin at high-impedance
D060A I/O Ports with 5.5V
Tol eranc e
(4)
— ±0.2 μAVSS ≤ VPIN ≤ 5.5V,
Pin at high-impedance
D061 MCLR
— ±0.2 μAVss ≤ VPIN ≤ VDD
D063 OSC1 — ±0.2 μAVss ≤ VPIN ≤ VDD
I
PU Weak Pull-up Current
D070 I
PURB PORTB Weak Pull-up Current 30 240 μAVDD = 3.3V, VPIN = VSS
Note 1: In RC oscillator configuration, the OSC1/CLKI pin is a Schmitt Trigger input. It is not recommended that the
PIC
®
device be driven with an external clock while in RC mode.
2: The leakage current on the MCLR
pin is strongly dependent on the applied voltage level. The specified
levels represent normal operating conditions. Higher leakage current may be measured at different input
voltages.
3: Negative current is defined as current sourced by the pin.
4: Refer to Table 10-2 for the pins that have corresponding tolerance limits.