Datasheet

PIC18F45J10 FAMILY
DS39682E-page 20 © 2009 Microchip Technology Inc.
PORTD is a bidirectional I/O port or a Parallel Slave
Port (PSP) for interfacing to a microprocessor port.
These pins have TTL input buffers when PSP module
is enabled.
RD0/PSP0/SCK2/
SCL2
RD0
PSP0
SCK2
SCL2
19 38 38
I/O
I/O
I/O
I/O
ST
TTL
ST
ST
Digital I/O.
Parallel Slave Port data.
Synchronous serial clock input/output for
SPI mode.
Synchronous serial clock input/output for
I
2
C™ mode.
RD1/PSP1/SDI2/SDA2
RD1
PSP1
SDI2
SDA2
20 39 39
I/O
I/O
I
I/O
ST
TTL
ST
ST
Digital I/O.
Parallel Slave Port data.
SPI data in.
I
2
C data I/O.
RD2/PSP2/SDO2
RD2
PSP2
SDO2
21 40 40
I/O
I/O
O
ST
TTL
Digital I/O.
Parallel Slave Port data.
SPI data out.
RD3/PSP3/SS2
RD3
PSP3
SS2
22 41 41
I/O
I/O
I
ST
TTL
TTL
Digital I/O.
Parallel Slave Port data.
SPI slave select input.
RD4/PSP4
RD4
PSP4
27 2 2
I/O
I/O
ST
TTL
Digital I/O.
Parallel Slave Port data.
RD5/PSP5/P1B
RD5
PSP5
P1B
28 3 3
I/O
I/O
O
ST
TTL
Digital I/O.
Parallel Slave Port data.
Enhanced CCP1 output.
RD6/PSP6/P1C
RD6
PSP6
P1C
29 4 4
I/O
I/O
O
ST
TTL
Digital I/O.
Parallel Slave Port data.
Enhanced CCP1 output.
RD7/PSP7/P1D
RD7
PSP7
P1D
30 5 5
I/O
I/O
O
ST
TTL
Digital I/O.
Parallel Slave Port data.
Enhanced CCP1 output.
TABLE 1-3: PIC18F44J10/45J10 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
PDIP QFN TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels I = Input
O = Output P = Power
Note 1: Default assignment for CCP2 when Configuration bit, CCP2MX, is set.
2: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.