Datasheet

PIC18F45J10 FAMILY
DS39682E-page 168 © 2009 Microchip Technology Inc.
FIGURE 16-9: I
2
C™ SLAVE MODE TIMING (TRANSMISSION, 7-BIT ADDRESSING)
SDAx SCLx BF (SSPxSTAT<0>)
A6
A5
A4 A3
A2
A1
D6
D5
D4
D3
D2
D1
D0
1 2 3 4 5 6 7 8 2 3 4 5 6 7 8 9
SSPxBUF is written in software
Cleared in software
Data in sampled
S
ACK
Transmitting Data
R/W = 0
ACK
Receiving Address
A7 D7
9
1
D6
D5
D4
D3
D2
D1
D0
2 3 4 5 6 7 8 9
SSPxBUF is written in software
Cleared in software
From SSPxIF ISR
Transmitting Data
D7
1
CKP (SSPxCON<4>)
P
ACK
CKP is set in software
CKP is set in software
SCLx held low while CPU responds to SSPxIF
SSPxIF (PIR1<3> or PIR3<7>)
From SSPxIF ISR
Clear by reading