Datasheet

PIC18F45J10 FAMILY
DS39682E-page 100 © 2009 Microchip Technology Inc.
TABLE 10-4: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
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Values
on page
PORTA — —RA5— RA3 RA2 RA1 RA0 50
LATA
— — PORTA Data Latch Register (Read and Write to Data Latch) 50
TRISA — — TRISA5 — TRISA3 TRISA2 TRISA1 TRISA0 50
ADCON1 — — VCFG1 VCFG0 PCFG3 PCFG2 PCFG1 PCFG0 48
CMCON
C2OUT C1OUT C2INV C1INV CIS CM2 CM1 CM0 49
CVRCON CVREN CVROE CVRR CVRSS CVR3 CVR2 CVR1 CVR0 49
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTA.