Datasheet

PIC18F2585/2680/4585/4680
DS80202G-page 10 © 2007 Microchip Technology Inc.
33. Module: ECAN™ Technology
Under specific conditions, the TXBxSIDH register
of the pending message for transmission may be
corrupted. The following conditions must exist for
this event to occur:
1. A transmit message must be pending.
2. All of the receive buffers must be full and a
received message is in the Message Assembly
Buffer (MAB).
3. A receiver buffer must be made available
(RXBxCON<RXFUL> set to ‘0’) when a Start-
of-Frame (SOF) is recognized on the CAN bus,
or on the instruction cycle prior to the SOF for
the TXBxSIDH corruption event to occur. The
timing of this event is crucial.
Work around
Ensure that a receive buffer overflow condition
does not occur, and/or ensure that a transmit
request is not pending, if a receive buffer overflow
condition does exist.
The pseudo-code segment in Example 6 is an
example of how to disable a pending transmission.
This code is for illustration purposes only.
Date Codes that pertain to this issue:
All engineering and production devices.
EXAMPLE 6:
34. Module: 10-Bit Analog-to-Digital
Converter
When the AD clock source is selected as 2 TOSC or
RC (when ADCS2:ADCS0 = 000 or x11), in
extremely rare cases, the E
IL (Integral Linearity
Error) and E
DL (Differential Linearity Error) may
exceed the data sheet specification at codes 511
and 512 only.
Work around
Select the AD clock source as 4 TOSC, 8 TOSC,
16 T
OSC, 32 TOSC or 64 TOSC and avoid selecting
2T
OSC or RC.
Date Codes that pertain to this issue:
All engineering and production devices.
If (RXBnOVFL == 1) // Has an overflow occurred?
{ If (TXREQ == 1)// Is a transmission pending?
{ TXREQ = 0; // Clear transmit request
If (TXABT == 1)// Store transmission aborted status value
MyFlag = 1;
}
}
Temp_RXREG = RXBx; // Read receive buffer
If (MyFlag) // Was previous transmission aborted?
{ TXREQ = 1; // Set transmit request
MyFlag = 0; // Reset stored transmission aborted status
}