Information

PIC18F2585/2680/4585/4680

33. Module: 10-Bit Analog-to-Digital

Converter

When the AD clock source is selected as 2 TOSC or

RC (when ADCS2:ADCS0 = 000 or x11), in

extremely rare cases, the EIL (Integral Linearity

Error) and E

DL (Differential Linearity Error) may

exceed the data sheet specification at codes 511

and 512 only.

Work around

Select the AD clock source as 4 TOSC, 8 TOSC,

16 T

OSC, 32 TOSC or 64 TOSC and avoid selecting

OSC or RC.

Date Codes that pertain to this issue:

All engineering and production devices.

REVISION HISTORY

Rev A Document (7/2006)

First revision of this document which includes silicon

issues 1-9 (ECCP), 9 (ECCP and CCP), 10-12 (Timer1/

Timer3), 13 (Timer1), 14-20 (MSSP), 21 (A/D),

22 (DC Characteristics – BOR), 23 (BOD/HLVD),

24 (Interrupts), 25-28 (EUSART), 29 (Reset), and 30-

32 (ECAN).

Rev B Document (12/2006)

Updated silicon issues 21 (MSSP) and 32-33 (ECAN™

Technology).

Rev C Document (2/2007)

Correct issue 31 ECAN™ Technology. Corrected code

comment in Example 6 for silicon issue 33 (ECAN™

Technology).

Rev D Document (5/2007)

Added silicon issue 34 (10-Bit Analog-to-Digital

Converter).

Rev E Document (10/2007)

Removed silicon issue 22 (A/D).