Information

© 2006 Microchip Technology Inc. DS80134H-page 3
PIC18FXX8
7. Module: A/D (External Voltage Reference)
and Comparator Voltage
Reference
When the external voltage reference, VREF-, is
selected for use with either the A/D or comparator
voltage reference, AVSS is connected to VREF- in
the comparator module. If V
REF- is a voltage other
than AV
SS (which must be tied externally to VSS),
excessive current will flow into the V
REF- pin.
Work around
If external VREF- is used with a voltage other than
0V, enable the comparator voltage reference by
setting the CVREN bit in the CVRCON register.
This disconnects V
REF- and AVSS within the
comparator module.
8. Module: CAN
CAN Disable mode change request is not
confirmed. A CAN Disable mode request by writing
‘001’ to the REQOP bits (CANCON<7:5>) immedi-
ately changes the OPMODE bits (CANSTAT<7:5>),
implying that Disable mode is accepted. This occurs
even though the CAN module itself may not have
switched its state.
Work around
Switch to Configuration mode instead. Wake-up
from CAN bus activity will continue to work even in
Configuration mode.
9. Module: MSSP (All I
2
C™ and SPI™ Modes)
The Buffer Full (BF) flag bit of the SSPSTAT regis-
ter (SSPSTAT<0>) may be inadvertently cleared
even when the SSPBUF register has not been
read. This will occur only when the following two
conditions occur simultaneously:
• The four Least Significant bits of the BSR
register are equal to 0Fh (BSR<3:0> = 1111)
and
• Any instruction that contains C9h in its 8 Least
Significant bits (i.e., register file addresses,
literal data, address offsets, etc.) is executed.
Work around
All work arounds will involve setting the contents of
BSR<3:0> to some value other than 0Fh.
In addition to those proposed below, other
solutions may exist.
1. When developing or modifying code, keep
these guidelines in mind:
• Assign 12-bit addresses to all variables.
This allows the assembler to know when
Access Banking can be used.
• Do not set the BSR to point to Bank 15
(BSR = 0Fh).
• Allow the assembler to manipulate the
access bit present in most instructions.
Accessing the SFRs in Bank 15 will be done
through the Access Bank. Continue to use
the BSR to select all GPR Banks.
2. If accessing a part of Bank 15 is required and
the use of Access Banking is not possible,
consider using Indirect Addressing mode.
3. If pointing the BSR to Bank 15 is unavoidable,
review the absolute file listing. Verify that no
instructions contain C9h in the 8 Least
Significant bits while the BSR points to Bank 15
(BSR = 0Fh).
Date Codes that pertain to this issue:
All engineering and production devices.