Information

PIC18FXX8
DS80134H-page 2 © 2006 Microchip Technology Inc.
3. Module: Core (Program Memory Space)
Performing table read operations above the user
program memory space (addresses over
1FFFFFh) may yield erroneous results at the
extreme low end of the device’s rated temperature
range (-40°C).
This applies specifically to addresses above
1FFFFFh, including the user ID locations
(200000h-200007h), the configuration bytes
(300000h-30000Dh) and the device ID locations
(3FFFFEh and 3FFFFFh). User program memory
is unaffected.
Work around
Two possible work arounds are presented. Other
solutions may exist.
1. Do not perform table read operations on areas
above the user memory space at -40°C.
2. Insert NOP instructions (specifically, literal
FFFFh) around any table read instructions.
The suggested optimal number is 4 instruc-
tions before and 8 instructions after each table
read. This may vary depending upon the
particular application and should be optimized
by the user.
Date Codes that pertain to this issue:
:
All engineering and production devices.
4. Module: Core (Program Memory Space)
Under certain conditions, the execution of a table
read instruction may yield erroneous results. This
has been observed when a table read instruction
and its read destination, as indicated by the Table
Pointer registers, are on opposite sides of the
4000h program memory address boundary.
This behavior has not been observed when the
instruction and its target both occur strictly within
the same half of the program memory space.
Work around
Insert a data word of value FFFFh immediately
following any table read instruction. This behaves
as a NOP instruction when executed. Using the
actual NOP instruction instead of a literal FFFFh
may not have the same results.
This is a recommended solution. Others solutions
may exist.
Date Codes that pertain to this issue:
All engineering and production devices.
5. Module: Core (Program Memory Space)
Under certain conditions, the execution of some
control operations may yield unexpected results.
This has been observed when the following
instructions vector code execution across the
4000h program memory address boundary:
• CALL
• GOTO
• RETURN
• RETLW
• RETFIE
There are no known issues related to any of these
instructions when execution occurs strictly above
or below the 4000h address boundary.
Work around
Two possible solutions are presented. Other solu-
tions may exist. It is recommended to implement
either, or both, as needed.
1. Insert a data word of value FFFFh as the first
instruction in the destination of a CALL or
GOTO.
2. Insert a data word of value FFFFh immediately
following any RETURN, RETLW or RETFIE
instruction.
In either case, the literal data behaves as a NOP
instruction when executed. Using the actual NOP
instruction instead of a literal FFFFh may not have
the same results.
Date Codes that pertain to this issue:
All engineering and production devices.
6. Module: Data EEPROM
When reading the data EEPROM, the contents of
the EEDATA register may be corrupted if the RD
bit (EECON1<0>) is set immediately following a
write to the address byte (EEADR). The actual
contents of the data EEPROM remain unaffected.
Work around
Do not set EEADR immediately before the
execution of a read. Write to EEADR at least one
instruction cycle before setting the RD bit. The
instruction between the write to EEADR and the
read can be any valid instruction, including a NOP.
Date Codes that pertain to this issue:
All engineering and production devices.
Note: This issue applies only to PIC18F258 and
PIC18F458 devices with 32 Kbytes of
Flash program memory. PIC18F248 and
PIC18F448 devices are not affected.
Note: This issue applies only to PIC18F258
and PIC18F458 devices with 32 Kbytes of
Flash program memory. PIC18F248 and
PIC18F448 devices are not affected.