Datasheet

© 2006 Microchip Technology Inc. DS41159E-page 27
PIC18FXX8
3.7 Time-out Sequence
On power-up, the time-out sequence is as follows:
First, PWRT time-out is invoked after the POR time
delay has expired, then OST is activated. The total
time-out will vary based on oscillator configuration and
the status of the PWRT. For example, in RC mode with
the PWRT disabled, there will be no time-out at all.
Figure 3-3, Figure 3-4, Figure 3-5, Figure 3-6 and
Figure 3-7 depict time-out sequences on power-up.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire.
Bringing MCLR
high will begin execution immediately
(Figure 3-5). This is useful for testing purposes or to
synchronize more than one PIC18FXX8 device
operating in parallel.
Table 3-2 shows the Reset conditions for some Special
Function Registers, while Table 3-3 shows the Reset
conditions for all registers.
TABLE 3-1: TIME-OUT IN VARIOUS SITUATIONS
REGISTER 3-1: RCON REGISTER BITS AND POSITIONS
TABLE 3-2: STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR
RCON REGISTER
Oscillator
Configuration
Power-up
(2)
Brown-out
(2)
Wake-up from
Sleep or
Oscillator Switch
PWRTEN
= 0 PWRTEN = 1
HS with PLL enabled
(1)
72 ms + 1024 TOSC + 2 ms 1024 TOSC + 2 ms 72 ms + 1024 TOSC + 2 ms 1024 TOSC + 2 ms
HS, XT, LP 72 ms + 1024 TOSC 1024 TOSC 72 ms + 1024 TOSC 1024 TOSC
EC 72 ms — 72 ms —
External RC 72 ms — 72 ms —
Note 1: 2 ms = Nominal time required for the 4x PLL to lock.
2: 72 ms is the nominal Power-up Timer delay.
R/W-0 U-0 U-0 R/W-1 R/W-1 R/W-1 R/W-0 R/W-1
IPEN
— —RITO PD POR BOR
bit 7 bit 0
Condition
Program
Counter
RCON
Register
RI
TO PD POR BOR STKFUL STKUNF
Power-on Reset 0000h 0--1 110q 1 1 1 0 0 u u
MCLR
Reset during normal
operation
0000h 0--0 011q u u u u u u u
Software Reset during normal
operation
0000h 0--0 011q 0 u u u u u u
Stack Full Reset during normal
operation
0000h 0--0 011q u u u 1 1 u 1
Stack Underflow Reset during
normal operation
0000h 0--0 011q u u u 1 1 1 u
MCLR
Reset during Sleep 0000h 0--0 011q u 1 0 u u u u
WDT Reset 0000h 0--0 011q u 0 1 u u u u
WDT Wake-up PC + 2 0--1 101q u 0 0 u u u u
Brown-out Reset 0000h 0--1 110q 1 1 1 u 0 u u
Interrupt wake-up from Sleep PC + 2
(1)
0--1 101q u 1 0 u u u u
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’
Note 1: When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the
interrupt vector (000008h or 000018h).